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Issue #3049 - loongarch64: fix scaled JIT memory addressing

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Basilisk-Dev 2026-04-25 13:10:17 -04:00 • committed by wuggy
commit df4de67d30
2 changed files with 23 additions and 23 deletions
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32
js/src/jit/loongarch64/Assembler-loongarch64.cpp
View file

@ -1056,30 +1056,30 @@ BufferOffset AssemblerLOONGARCH64::as_stx_d(Register rd, Register rj, Register r
BufferOffset AssemblerLOONGARCH64::as_ldptr_w(Register rd, Register rj, BufferOffset AssemblerLOONGARCH64::as_ldptr_w(Register rd, Register rj,
int32_t si14) { int32_t si14) {
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
spew("ldptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("ldptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14);
return writeInst(InstImm(op_ldptr_w, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_ldptr_w, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_ldptr_d(Register rd, Register rj, BufferOffset AssemblerLOONGARCH64::as_ldptr_d(Register rd, Register rj,
int32_t si14) { int32_t si14) {
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
spew("ldptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("ldptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14);
return writeInst(InstImm(op_ldptr_d, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_ldptr_d, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_stptr_w(Register rd, Register rj, BufferOffset AssemblerLOONGARCH64::as_stptr_w(Register rd, Register rj,
int32_t si14) { int32_t si14) {
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
spew("stptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("stptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14);
return writeInst(InstImm(op_stptr_w, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_stptr_w, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_stptr_d(Register rd, Register rj, BufferOffset AssemblerLOONGARCH64::as_stptr_d(Register rd, Register rj,
int32_t si14) { int32_t si14) {
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
spew("stptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("stptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14);
return writeInst(InstImm(op_stptr_d, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_stptr_d, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_preld(int32_t hint, Register rj, BufferOffset AssemblerLOONGARCH64::as_preld(int32_t hint, Register rj,
@ -1308,26 +1308,26 @@ BufferOffset AssemblerLOONGARCH64::as_ammin_db_du(Register rd, Register rj,
BufferOffset AssemblerLOONGARCH64::as_ll_w(Register rd, Register rj, int32_t si14) { BufferOffset AssemblerLOONGARCH64::as_ll_w(Register rd, Register rj, int32_t si14) {
spew("ll_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("ll_w %3s,%3s,0x%x", rd.name(), rj.name(), si14);
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
return writeInst(InstImm(op_ll_w, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_ll_w, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_ll_d(Register rd, Register rj, int32_t si14) { BufferOffset AssemblerLOONGARCH64::as_ll_d(Register rd, Register rj, int32_t si14) {
spew("ll_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("ll_d %3s,%3s,0x%x", rd.name(), rj.name(), si14);
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
return writeInst(InstImm(op_ll_d, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_ll_d, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_sc_w(Register rd, Register rj, int32_t si14) { BufferOffset AssemblerLOONGARCH64::as_sc_w(Register rd, Register rj, int32_t si14) {
spew("sc_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("sc_w %3s,%3s,0x%x", rd.name(), rj.name(), si14);
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
return writeInst(InstImm(op_sc_w, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_sc_w, si14 >> 2, rj, rd, 14).encode());
} }
BufferOffset AssemblerLOONGARCH64::as_sc_d(Register rd, Register rj, int32_t si14) { BufferOffset AssemblerLOONGARCH64::as_sc_d(Register rd, Register rj, int32_t si14) {
spew("sc_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); spew("sc_d %3s,%3s,0x%x", rd.name(), rj.name(), si14);
MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0));
return writeInst(InstImm(op_sc_d, si14, rj, rd, 14).encode()); return writeInst(InstImm(op_sc_d, si14 >> 2, rj, rd, 14).encode());
} }
// Barrier instructions // Barrier instructions

14
js/src/jit/loongarch64/MacroAssembler-loongarch64.cpp
View file

@ -943,7 +943,7 @@ void MacroAssemblerLOONGARCH64::ma_load(Register dest, Address address,
if ((address.offset & 0x3) == 0 && if ((address.offset & 0x3) == 0 &&
(size == SizeDouble || (size == SizeDouble ||
(size == SizeWord && SignExtend == extension))) { (size == SizeWord && SignExtend == extension))) {
if (!is_intN(address.offset, 14)) { if (!Imm16::IsInSignedRange(address.offset)) {
ma_li(ScratchRegister, Imm32(address.offset)); ma_li(ScratchRegister, Imm32(address.offset));
as_add_d(ScratchRegister, address.base, ScratchRegister); as_add_d(ScratchRegister, address.base, ScratchRegister);
base = ScratchRegister; base = ScratchRegister;
@ -1014,7 +1014,7 @@ void MacroAssemblerLOONGARCH64::ma_store(Register data, Address address,
case SizeWord: case SizeWord:
case SizeDouble: case SizeDouble:
if ((address.offset & 0x3) == 0) { if ((address.offset & 0x3) == 0) {
if (!is_intN(address.offset, 14)) { if (!Imm16::IsInSignedRange(address.offset)) {
ma_li(ScratchRegister, Imm32(address.offset)); ma_li(ScratchRegister, Imm32(address.offset));
as_add_d(ScratchRegister, address.base, ScratchRegister); as_add_d(ScratchRegister, address.base, ScratchRegister);
base = ScratchRegister; base = ScratchRegister;
@ -1060,7 +1060,7 @@ void MacroAssemblerLOONGARCH64Compat::computeScaledAddress(const BaseIndex& addr
if (shift) { if (shift) {
MOZ_ASSERT(shift <= 4); MOZ_ASSERT(shift <= 4);
as_alsl_d(dest, index, base, shift); as_alsl_d(dest, index, base, shift - 1);
} else { } else {
as_add_d(dest, base, index); as_add_d(dest, base, index);
} }
@ -3160,7 +3160,7 @@ void MacroAssemblerLOONGARCH64Compat::load32(const BaseIndex& address,
ma_li(scratch, Imm32(offset)); ma_li(scratch, Imm32(offset));
if (shift != 0) { if (shift != 0) {
MOZ_ASSERT(shift <= 4); MOZ_ASSERT(shift <= 4);
as_alsl_d(scratch, index, scratch, shift); as_alsl_d(scratch, index, scratch, shift - 1);
} else { } else {
as_add_d(scratch, index, scratch); as_add_d(scratch, index, scratch);
} }
@ -3204,7 +3204,7 @@ void MacroAssemblerLOONGARCH64Compat::loadPtr(const BaseIndex& src, Register des
ma_li(scratch, Imm32(offset)); ma_li(scratch, Imm32(offset));
if (shift != 0) { if (shift != 0) {
MOZ_ASSERT(shift <= 4); MOZ_ASSERT(shift <= 4);
as_alsl_d(scratch, index, scratch, shift); as_alsl_d(scratch, index, scratch, shift - 1);
} else { } else {
as_add_d(scratch, index, scratch); as_add_d(scratch, index, scratch);
} }
@ -3355,7 +3355,7 @@ void MacroAssemblerLOONGARCH64Compat::storePtr(Register src,
if (shift == 0) { if (shift == 0) {
as_add_d(scratch, base, index); as_add_d(scratch, base, index);
} else { } else {
as_alsl_d(scratch, index, base, shift); as_alsl_d(scratch, index, base, shift - 1);
} }
as_st_d(src, scratch, offset); as_st_d(src, scratch, offset);
} else { } else {
@ -3364,7 +3364,7 @@ void MacroAssemblerLOONGARCH64Compat::storePtr(Register src,
if (shift == 0) { if (shift == 0) {
as_add_d(scratch, scratch, index); as_add_d(scratch, scratch, index);
} else { } else {
as_alsl_d(scratch, index, scratch, shift); as_alsl_d(scratch, index, scratch, shift - 1);
} }
as_stx_d(src, base, scratch); as_stx_d(src, base, scratch);
} }