From df4de67d300c2c263537c245311347343db8a8db Mon Sep 17 00:00:00 2001 From: Basilisk-Dev Date: Sat, 25 Apr 2026 13:10:17 -0400 Subject: [PATCH] Issue #3049 - loongarch64: fix scaled JIT memory addressing --- .../jit/loongarch64/Assembler-loongarch64.cpp | 32 +++++++++---------- .../MacroAssembler-loongarch64.cpp | 14 ++++---- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/js/src/jit/loongarch64/Assembler-loongarch64.cpp b/js/src/jit/loongarch64/Assembler-loongarch64.cpp index 610708c81c..77e7c734ce 100644 --- a/js/src/jit/loongarch64/Assembler-loongarch64.cpp +++ b/js/src/jit/loongarch64/Assembler-loongarch64.cpp @@ -1056,30 +1056,30 @@ BufferOffset AssemblerLOONGARCH64::as_stx_d(Register rd, Register rj, Register r BufferOffset AssemblerLOONGARCH64::as_ldptr_w(Register rd, Register rj, int32_t si14) { - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); spew("ldptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); - return writeInst(InstImm(op_ldptr_w, si14, rj, rd, 14).encode()); + return writeInst(InstImm(op_ldptr_w, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_ldptr_d(Register rd, Register rj, int32_t si14) { - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); spew("ldptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); - return writeInst(InstImm(op_ldptr_d, si14, rj, rd, 14).encode()); + return writeInst(InstImm(op_ldptr_d, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_stptr_w(Register rd, Register rj, int32_t si14) { - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); spew("stptr_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); - return writeInst(InstImm(op_stptr_w, si14, rj, rd, 14).encode()); + return writeInst(InstImm(op_stptr_w, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_stptr_d(Register rd, Register rj, int32_t si14) { - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); spew("stptr_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); - return writeInst(InstImm(op_stptr_d, si14, rj, rd, 14).encode()); + return writeInst(InstImm(op_stptr_d, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_preld(int32_t hint, Register rj, @@ -1308,26 +1308,26 @@ BufferOffset AssemblerLOONGARCH64::as_ammin_db_du(Register rd, Register rj, BufferOffset AssemblerLOONGARCH64::as_ll_w(Register rd, Register rj, int32_t si14) { spew("ll_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); - return writeInst(InstImm(op_ll_w, si14, rj, rd, 14).encode()); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); + return writeInst(InstImm(op_ll_w, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_ll_d(Register rd, Register rj, int32_t si14) { spew("ll_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); - return writeInst(InstImm(op_ll_d, si14, rj, rd, 14).encode()); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); + return writeInst(InstImm(op_ll_d, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_sc_w(Register rd, Register rj, int32_t si14) { spew("sc_w %3s,%3s,0x%x", rd.name(), rj.name(), si14); - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); - return writeInst(InstImm(op_sc_w, si14, rj, rd, 14).encode()); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); + return writeInst(InstImm(op_sc_w, si14 >> 2, rj, rd, 14).encode()); } BufferOffset AssemblerLOONGARCH64::as_sc_d(Register rd, Register rj, int32_t si14) { spew("sc_d %3s,%3s,0x%x", rd.name(), rj.name(), si14); - MOZ_ASSERT(is_intN(si14, 14) && ((si14 & 0x3) == 0)); - return writeInst(InstImm(op_sc_d, si14, rj, rd, 14).encode()); + MOZ_ASSERT(is_intN(si14, 16) && ((si14 & 0x3) == 0)); + return writeInst(InstImm(op_sc_d, si14 >> 2, rj, rd, 14).encode()); } // Barrier instructions diff --git a/js/src/jit/loongarch64/MacroAssembler-loongarch64.cpp b/js/src/jit/loongarch64/MacroAssembler-loongarch64.cpp index d3b97c13b4..3d961c9e35 100644 --- a/js/src/jit/loongarch64/MacroAssembler-loongarch64.cpp +++ b/js/src/jit/loongarch64/MacroAssembler-loongarch64.cpp @@ -943,7 +943,7 @@ void MacroAssemblerLOONGARCH64::ma_load(Register dest, Address address, if ((address.offset & 0x3) == 0 && (size == SizeDouble || (size == SizeWord && SignExtend == extension))) { - if (!is_intN(address.offset, 14)) { + if (!Imm16::IsInSignedRange(address.offset)) { ma_li(ScratchRegister, Imm32(address.offset)); as_add_d(ScratchRegister, address.base, ScratchRegister); base = ScratchRegister; @@ -1014,7 +1014,7 @@ void MacroAssemblerLOONGARCH64::ma_store(Register data, Address address, case SizeWord: case SizeDouble: if ((address.offset & 0x3) == 0) { - if (!is_intN(address.offset, 14)) { + if (!Imm16::IsInSignedRange(address.offset)) { ma_li(ScratchRegister, Imm32(address.offset)); as_add_d(ScratchRegister, address.base, ScratchRegister); base = ScratchRegister; @@ -1060,7 +1060,7 @@ void MacroAssemblerLOONGARCH64Compat::computeScaledAddress(const BaseIndex& addr if (shift) { MOZ_ASSERT(shift <= 4); - as_alsl_d(dest, index, base, shift); + as_alsl_d(dest, index, base, shift - 1); } else { as_add_d(dest, base, index); } @@ -3160,7 +3160,7 @@ void MacroAssemblerLOONGARCH64Compat::load32(const BaseIndex& address, ma_li(scratch, Imm32(offset)); if (shift != 0) { MOZ_ASSERT(shift <= 4); - as_alsl_d(scratch, index, scratch, shift); + as_alsl_d(scratch, index, scratch, shift - 1); } else { as_add_d(scratch, index, scratch); } @@ -3204,7 +3204,7 @@ void MacroAssemblerLOONGARCH64Compat::loadPtr(const BaseIndex& src, Register des ma_li(scratch, Imm32(offset)); if (shift != 0) { MOZ_ASSERT(shift <= 4); - as_alsl_d(scratch, index, scratch, shift); + as_alsl_d(scratch, index, scratch, shift - 1); } else { as_add_d(scratch, index, scratch); } @@ -3355,7 +3355,7 @@ void MacroAssemblerLOONGARCH64Compat::storePtr(Register src, if (shift == 0) { as_add_d(scratch, base, index); } else { - as_alsl_d(scratch, index, base, shift); + as_alsl_d(scratch, index, base, shift - 1); } as_st_d(src, scratch, offset); } else { @@ -3364,7 +3364,7 @@ void MacroAssemblerLOONGARCH64Compat::storePtr(Register src, if (shift == 0) { as_add_d(scratch, scratch, index); } else { - as_alsl_d(scratch, index, scratch, shift); + as_alsl_d(scratch, index, scratch, shift - 1); } as_stx_d(src, base, scratch); }