mirror of
https://repo.dactyloidae.xyz/Dactyloidae/UXP.git
synced 2026-10-31 11:37:30 +09:00
1040 lines
33 KiB
C++
1040 lines
33 KiB
C++
/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "jit/x86/MacroAssembler-x86.h"
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#include "mozilla/Alignment.h"
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#include "mozilla/Casting.h"
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#include "jit/Bailouts.h"
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#include "jit/BaselineFrame.h"
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#include "jit/JitFrames.h"
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#include "jit/MacroAssembler.h"
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#include "jit/MoveEmitter.h"
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#include "jsscriptinlines.h"
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#include "jit/MacroAssembler-inl.h"
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using namespace js;
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using namespace js::jit;
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static const double TO_DOUBLE_HIGH_SCALE = 0x100000000;
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bool
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MacroAssemblerX86::convertUInt64ToDoubleNeedsTemp()
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{
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return HasSSE3();
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}
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void
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MacroAssemblerX86::convertUInt64ToDouble(Register64 src, FloatRegister dest, Register temp)
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{
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// SUBPD needs SSE2, HADDPD needs SSE3.
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if (!HasSSE3()) {
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MOZ_ASSERT(temp == Register::Invalid());
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// Zero the dest register to break dependencies, see convertInt32ToDouble.
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zeroDouble(dest);
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asMasm().Push(src.high);
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asMasm().Push(src.low);
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fild(Operand(esp, 0));
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Label notNegative;
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asMasm().branch32(Assembler::NotSigned, src.high, Imm32(0), ¬Negative);
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double add_constant = 18446744073709551616.0; // 2^64
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store64(Imm64(mozilla::BitwiseCast<uint64_t>(add_constant)), Address(esp, 0));
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fld(Operand(esp, 0));
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faddp();
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bind(¬Negative);
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fstp(Operand(esp, 0));
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vmovsd(Address(esp, 0), dest);
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asMasm().freeStack(2*sizeof(intptr_t));
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return;
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}
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// Following operation uses entire 128-bit of dest XMM register.
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// Currently higher 64-bit is free when we have access to lower 64-bit.
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MOZ_ASSERT(dest.size() == 8);
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FloatRegister dest128 = FloatRegister(dest.encoding(), FloatRegisters::Simd128);
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// Assume that src is represented as following:
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// src = 0x HHHHHHHH LLLLLLLL
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// Move src to dest (=dest128) and ScratchInt32x4Reg (=scratch):
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// dest = 0x 00000000 00000000 00000000 LLLLLLLL
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// scratch = 0x 00000000 00000000 00000000 HHHHHHHH
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vmovd(src.low, dest128);
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vmovd(src.high, ScratchSimd128Reg);
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// Unpack and interleave dest and scratch to dest:
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// dest = 0x 00000000 00000000 HHHHHHHH LLLLLLLL
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vpunpckldq(ScratchSimd128Reg, dest128, dest128);
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// Unpack and interleave dest and a constant C1 to dest:
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// C1 = 0x 00000000 00000000 45300000 43300000
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// dest = 0x 45300000 HHHHHHHH 43300000 LLLLLLLL
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// here, each 64-bit part of dest represents following double:
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// HI(dest) = 0x 1.00000HHHHHHHH * 2**84 == 2**84 + 0x HHHHHHHH 00000000
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// LO(dest) = 0x 1.00000LLLLLLLL * 2**52 == 2**52 + 0x 00000000 LLLLLLLL
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// See convertUInt64ToDouble for the details.
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static const int32_t CST1[4] = {
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0x43300000,
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0x45300000,
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0x0,
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0x0,
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};
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loadConstantSimd128Int(SimdConstant::CreateX4(CST1), ScratchSimd128Reg);
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vpunpckldq(ScratchSimd128Reg, dest128, dest128);
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// Subtract a constant C2 from dest, for each 64-bit part:
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// C2 = 0x 45300000 00000000 43300000 00000000
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// here, each 64-bit part of C2 represents following double:
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// HI(C2) = 0x 1.0000000000000 * 2**84 == 2**84
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// LO(C2) = 0x 1.0000000000000 * 2**52 == 2**52
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// after the operation each 64-bit part of dest represents following:
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// HI(dest) = double(0x HHHHHHHH 00000000)
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// LO(dest) = double(0x 00000000 LLLLLLLL)
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static const int32_t CST2[4] = {
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0x0,
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0x43300000,
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0x0,
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0x45300000,
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};
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loadConstantSimd128Int(SimdConstant::CreateX4(CST2), ScratchSimd128Reg);
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vsubpd(ScratchSimd128Reg, dest128, dest128);
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// Add HI(dest) and LO(dest) in double and store it into LO(dest),
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// LO(dest) = double(0x HHHHHHHH 00000000) + double(0x 00000000 LLLLLLLL)
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// = double(0x HHHHHHHH LLLLLLLL)
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// = double(src)
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vhaddpd(dest128, dest128);
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}
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void
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MacroAssemblerX86::loadConstantDouble(wasm::RawF64 d, FloatRegister dest)
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{
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if (maybeInlineDouble(d, dest))
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return;
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Double* dbl = getDouble(d);
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if (!dbl)
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return;
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masm.vmovsd_mr(nullptr, dest.encoding());
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propagateOOM(dbl->uses.append(CodeOffset(masm.size())));
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}
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void
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MacroAssemblerX86::loadConstantDouble(double d, FloatRegister dest)
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{
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loadConstantDouble(wasm::RawF64(d), dest);
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}
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void
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MacroAssemblerX86::loadConstantFloat32(wasm::RawF32 f, FloatRegister dest)
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{
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if (maybeInlineFloat(f, dest))
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return;
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Float* flt = getFloat(f);
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if (!flt)
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return;
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masm.vmovss_mr(nullptr, dest.encoding());
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propagateOOM(flt->uses.append(CodeOffset(masm.size())));
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}
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void
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MacroAssemblerX86::loadConstantFloat32(float f, FloatRegister dest)
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{
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loadConstantFloat32(wasm::RawF32(f), dest);
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}
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void
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MacroAssemblerX86::loadConstantSimd128Int(const SimdConstant& v, FloatRegister dest)
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{
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if (maybeInlineSimd128Int(v, dest))
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return;
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SimdData* i4 = getSimdData(v);
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if (!i4)
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return;
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masm.vmovdqa_mr(nullptr, dest.encoding());
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propagateOOM(i4->uses.append(CodeOffset(masm.size())));
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}
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void
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MacroAssemblerX86::loadConstantSimd128Float(const SimdConstant& v, FloatRegister dest)
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{
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if (maybeInlineSimd128Float(v, dest))
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return;
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SimdData* f4 = getSimdData(v);
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if (!f4)
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return;
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masm.vmovaps_mr(nullptr, dest.encoding());
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propagateOOM(f4->uses.append(CodeOffset(masm.size())));
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}
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void
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MacroAssemblerX86::finish()
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{
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if (!doubles_.empty())
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masm.haltingAlign(sizeof(double));
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for (const Double& d : doubles_) {
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CodeOffset cst(masm.currentOffset());
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for (CodeOffset use : d.uses)
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addCodeLabel(CodeLabel(use, cst));
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masm.int64Constant(d.value);
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if (!enoughMemory_)
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return;
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}
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if (!floats_.empty())
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masm.haltingAlign(sizeof(float));
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for (const Float& f : floats_) {
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CodeOffset cst(masm.currentOffset());
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for (CodeOffset use : f.uses)
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addCodeLabel(CodeLabel(use, cst));
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masm.int32Constant(f.value);
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if (!enoughMemory_)
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return;
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}
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// SIMD memory values must be suitably aligned.
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if (!simds_.empty())
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masm.haltingAlign(SimdMemoryAlignment);
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for (const SimdData& v : simds_) {
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CodeOffset cst(masm.currentOffset());
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for (CodeOffset use : v.uses)
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addCodeLabel(CodeLabel(use, cst));
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masm.simd128Constant(v.value.bytes());
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if (!enoughMemory_)
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return;
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}
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}
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void
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MacroAssemblerX86::handleFailureWithHandlerTail(void* handler)
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{
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// Reserve space for exception information.
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subl(Imm32(sizeof(ResumeFromException)), esp);
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movl(esp, eax);
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// Call the handler.
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asMasm().setupUnalignedABICall(ecx);
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asMasm().passABIArg(eax);
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asMasm().callWithABI(handler);
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Label entryFrame;
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Label catch_;
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Label finally;
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Label return_;
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Label bailout;
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loadPtr(Address(esp, offsetof(ResumeFromException, kind)), eax);
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asMasm().branch32(Assembler::Equal, eax, Imm32(ResumeFromException::RESUME_ENTRY_FRAME),
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&entryFrame);
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asMasm().branch32(Assembler::Equal, eax, Imm32(ResumeFromException::RESUME_CATCH), &catch_);
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asMasm().branch32(Assembler::Equal, eax, Imm32(ResumeFromException::RESUME_FINALLY), &finally);
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asMasm().branch32(Assembler::Equal, eax, Imm32(ResumeFromException::RESUME_FORCED_RETURN),
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&return_);
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asMasm().branch32(Assembler::Equal, eax, Imm32(ResumeFromException::RESUME_BAILOUT), &bailout);
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breakpoint(); // Invalid kind.
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// No exception handler. Load the error value, load the new stack pointer
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// and return from the entry frame.
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bind(&entryFrame);
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moveValue(MagicValue(JS_ION_ERROR), JSReturnOperand);
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loadPtr(Address(esp, offsetof(ResumeFromException, stackPointer)), esp);
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ret();
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// If we found a catch handler, this must be a baseline frame. Restore state
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// and jump to the catch block.
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bind(&catch_);
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loadPtr(Address(esp, offsetof(ResumeFromException, target)), eax);
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loadPtr(Address(esp, offsetof(ResumeFromException, framePointer)), ebp);
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loadPtr(Address(esp, offsetof(ResumeFromException, stackPointer)), esp);
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jmp(Operand(eax));
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// If we found a finally block, this must be a baseline frame. Push
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// two values expected by JSOP_RETSUB: BooleanValue(true) and the
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// exception.
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bind(&finally);
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ValueOperand exception = ValueOperand(ecx, edx);
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loadValue(Address(esp, offsetof(ResumeFromException, exception)), exception);
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loadPtr(Address(esp, offsetof(ResumeFromException, target)), eax);
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loadPtr(Address(esp, offsetof(ResumeFromException, framePointer)), ebp);
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loadPtr(Address(esp, offsetof(ResumeFromException, stackPointer)), esp);
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pushValue(BooleanValue(true));
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pushValue(exception);
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jmp(Operand(eax));
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// Only used in debug mode. Return BaselineFrame->returnValue() to the caller.
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bind(&return_);
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loadPtr(Address(esp, offsetof(ResumeFromException, framePointer)), ebp);
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loadPtr(Address(esp, offsetof(ResumeFromException, stackPointer)), esp);
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loadValue(Address(ebp, BaselineFrame::reverseOffsetOfReturnValue()), JSReturnOperand);
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movl(ebp, esp);
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pop(ebp);
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// If profiling is enabled, then update the lastProfilingFrame to refer to caller
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// frame before returning.
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{
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Label skipProfilingInstrumentation;
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// Test if profiler enabled.
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AbsoluteAddress addressOfEnabled(GetJitContext()->runtime->spsProfiler().addressOfEnabled());
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asMasm().branch32(Assembler::Equal, addressOfEnabled, Imm32(0),
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&skipProfilingInstrumentation);
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profilerExitFrame();
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bind(&skipProfilingInstrumentation);
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}
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ret();
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// If we are bailing out to baseline to handle an exception, jump to
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// the bailout tail stub.
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bind(&bailout);
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loadPtr(Address(esp, offsetof(ResumeFromException, bailoutInfo)), ecx);
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movl(Imm32(BAILOUT_RETURN_OK), eax);
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jmp(Operand(esp, offsetof(ResumeFromException, target)));
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}
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void
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MacroAssemblerX86::profilerEnterFrame(Register framePtr, Register scratch)
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{
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AbsoluteAddress activation(GetJitContext()->runtime->addressOfProfilingActivation());
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loadPtr(activation, scratch);
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storePtr(framePtr, Address(scratch, JitActivation::offsetOfLastProfilingFrame()));
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storePtr(ImmPtr(nullptr), Address(scratch, JitActivation::offsetOfLastProfilingCallSite()));
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}
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void
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MacroAssemblerX86::profilerExitFrame()
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{
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jmp(GetJitContext()->runtime->jitRuntime()->getProfilerExitFrameTail());
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}
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MacroAssembler&
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MacroAssemblerX86::asMasm()
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{
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return *static_cast<MacroAssembler*>(this);
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}
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const MacroAssembler&
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MacroAssemblerX86::asMasm() const
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{
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return *static_cast<const MacroAssembler*>(this);
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}
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void
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MacroAssembler::subFromStackPtr(Imm32 imm32)
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{
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if (imm32.value) {
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// On windows, we cannot skip very far down the stack without touching the
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// memory pages in-between. This is a corner-case code for situations where the
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// Ion frame data for a piece of code is very large. To handle this special case,
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// for frames over 1k in size we allocate memory on the stack incrementally, touching
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// it as we go.
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uint32_t amountLeft = imm32.value;
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while (amountLeft > 4096) {
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subl(Imm32(4096), StackPointer);
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store32(Imm32(0), Address(StackPointer, 0));
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amountLeft -= 4096;
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}
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subl(Imm32(amountLeft), StackPointer);
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}
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}
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//{{{ check_macroassembler_style
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// ===============================================================
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// ABI function calls.
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void
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MacroAssembler::setupUnalignedABICall(Register scratch)
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{
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setupABICall();
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dynamicAlignment_ = true;
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movl(esp, scratch);
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andl(Imm32(~(ABIStackAlignment - 1)), esp);
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push(scratch);
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}
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void
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MacroAssembler::callWithABIPre(uint32_t* stackAdjust, bool callFromWasm)
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{
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MOZ_ASSERT(inCall_);
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uint32_t stackForCall = abiArgs_.stackBytesConsumedSoFar();
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if (dynamicAlignment_) {
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// sizeof(intptr_t) accounts for the saved stack pointer pushed by
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// setupUnalignedABICall.
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stackForCall += ComputeByteAlignment(stackForCall + sizeof(intptr_t),
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ABIStackAlignment);
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} else {
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uint32_t alignmentAtPrologue = callFromWasm ? sizeof(wasm::Frame) : 0;
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stackForCall += ComputeByteAlignment(stackForCall + framePushed() + alignmentAtPrologue,
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ABIStackAlignment);
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}
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*stackAdjust = stackForCall;
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reserveStack(stackForCall);
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// Position all arguments.
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{
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enoughMemory_ &= moveResolver_.resolve();
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if (!enoughMemory_)
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return;
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MoveEmitter emitter(*this);
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emitter.emit(moveResolver_);
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emitter.finish();
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}
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assertStackAlignment(ABIStackAlignment);
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}
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void
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MacroAssembler::callWithABIPost(uint32_t stackAdjust, MoveOp::Type result)
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{
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freeStack(stackAdjust);
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if (result == MoveOp::DOUBLE) {
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reserveStack(sizeof(double));
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fstp(Operand(esp, 0));
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loadDouble(Operand(esp, 0), ReturnDoubleReg);
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freeStack(sizeof(double));
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} else if (result == MoveOp::FLOAT32) {
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reserveStack(sizeof(float));
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fstp32(Operand(esp, 0));
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loadFloat32(Operand(esp, 0), ReturnFloat32Reg);
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freeStack(sizeof(float));
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}
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if (dynamicAlignment_)
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pop(esp);
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#ifdef DEBUG
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MOZ_ASSERT(inCall_);
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inCall_ = false;
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#endif
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}
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void
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MacroAssembler::callWithABINoProfiler(Register fun, MoveOp::Type result)
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{
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uint32_t stackAdjust;
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callWithABIPre(&stackAdjust);
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call(fun);
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callWithABIPost(stackAdjust, result);
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}
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void
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MacroAssembler::callWithABINoProfiler(const Address& fun, MoveOp::Type result)
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{
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uint32_t stackAdjust;
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callWithABIPre(&stackAdjust);
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call(fun);
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callWithABIPost(stackAdjust, result);
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}
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// ===============================================================
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// Branch functions
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void
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MacroAssembler::branchPtrInNurseryChunk(Condition cond, Register ptr, Register temp,
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Label* label)
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{
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MOZ_ASSERT(temp != InvalidReg); // A temp register is required for x86.
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MOZ_ASSERT(ptr != temp);
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movePtr(ptr, temp);
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branchPtrInNurseryChunkImpl(cond, temp, label);
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}
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void
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MacroAssembler::branchPtrInNurseryChunk(Condition cond, const Address& address, Register temp,
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Label* label)
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{
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MOZ_ASSERT(temp != InvalidReg); // A temp register is required for x86.
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loadPtr(address, temp);
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branchPtrInNurseryChunkImpl(cond, temp, label);
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}
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void
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MacroAssembler::branchPtrInNurseryChunkImpl(Condition cond, Register ptr, Label* label)
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{
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MOZ_ASSERT(cond == Assembler::Equal || cond == Assembler::NotEqual);
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orPtr(Imm32(gc::ChunkMask), ptr);
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branch32(cond, Address(ptr, gc::ChunkLocationOffsetFromLastByte),
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Imm32(int32_t(gc::ChunkLocation::Nursery)), label);
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}
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void
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MacroAssembler::branchValueIsNurseryObject(Condition cond, const Address& address, Register temp,
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Label* label)
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{
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MOZ_ASSERT(cond == Assembler::Equal || cond == Assembler::NotEqual);
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Label done;
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branchTestObject(Assembler::NotEqual, address, cond == Assembler::Equal ? &done : label);
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branchPtrInNurseryChunk(cond, address, temp, label);
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bind(&done);
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}
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void
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MacroAssembler::branchValueIsNurseryObject(Condition cond, ValueOperand value, Register temp,
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Label* label)
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{
|
|
MOZ_ASSERT(cond == Assembler::Equal || cond == Assembler::NotEqual);
|
|
|
|
Label done;
|
|
|
|
branchTestObject(Assembler::NotEqual, value, cond == Assembler::Equal ? &done : label);
|
|
branchPtrInNurseryChunk(cond, value.payloadReg(), temp, label);
|
|
|
|
bind(&done);
|
|
}
|
|
|
|
void
|
|
MacroAssembler::branchTestValue(Condition cond, const ValueOperand& lhs,
|
|
const Value& rhs, Label* label)
|
|
{
|
|
MOZ_ASSERT(cond == Equal || cond == NotEqual);
|
|
if (rhs.isGCThing())
|
|
cmpPtr(lhs.payloadReg(), ImmGCPtr(rhs.toGCThing()));
|
|
else
|
|
cmpPtr(lhs.payloadReg(), ImmWord(rhs.toNunboxPayload()));
|
|
|
|
if (cond == Equal) {
|
|
Label done;
|
|
j(NotEqual, &done);
|
|
{
|
|
cmp32(lhs.typeReg(), Imm32(rhs.toNunboxTag()));
|
|
j(Equal, label);
|
|
}
|
|
bind(&done);
|
|
} else {
|
|
j(NotEqual, label);
|
|
|
|
cmp32(lhs.typeReg(), Imm32(rhs.toNunboxTag()));
|
|
j(NotEqual, label);
|
|
}
|
|
}
|
|
|
|
// ========================================================================
|
|
// Memory access primitives.
|
|
template <typename T>
|
|
void
|
|
MacroAssembler::storeUnboxedValue(const ConstantOrRegister& value, MIRType valueType,
|
|
const T& dest, MIRType slotType)
|
|
{
|
|
if (valueType == MIRType::Double) {
|
|
storeDouble(value.reg().typedReg().fpu(), dest);
|
|
return;
|
|
}
|
|
|
|
// Store the type tag if needed.
|
|
if (valueType != slotType)
|
|
storeTypeTag(ImmType(ValueTypeFromMIRType(valueType)), Operand(dest));
|
|
|
|
// Store the payload.
|
|
if (value.constant())
|
|
storePayload(value.value(), Operand(dest));
|
|
else
|
|
storePayload(value.reg().typedReg().gpr(), Operand(dest));
|
|
}
|
|
|
|
template void
|
|
MacroAssembler::storeUnboxedValue(const ConstantOrRegister& value, MIRType valueType,
|
|
const Address& dest, MIRType slotType);
|
|
template void
|
|
MacroAssembler::storeUnboxedValue(const ConstantOrRegister& value, MIRType valueType,
|
|
const BaseIndex& dest, MIRType slotType);
|
|
|
|
// wasm specific methods, used in both the wasm baseline compiler and ion.
|
|
|
|
void
|
|
MacroAssembler::wasmLoad(const wasm::MemoryAccessDesc& access, Operand srcAddr, AnyRegister out)
|
|
{
|
|
memoryBarrier(access.barrierBefore());
|
|
|
|
size_t loadOffset = size();
|
|
switch (access.type()) {
|
|
case Scalar::Int8:
|
|
movsblWithPatch(srcAddr, out.gpr());
|
|
break;
|
|
case Scalar::Uint8:
|
|
movzblWithPatch(srcAddr, out.gpr());
|
|
break;
|
|
case Scalar::Int16:
|
|
movswlWithPatch(srcAddr, out.gpr());
|
|
break;
|
|
case Scalar::Uint16:
|
|
movzwlWithPatch(srcAddr, out.gpr());
|
|
break;
|
|
case Scalar::Int32:
|
|
case Scalar::Uint32:
|
|
movlWithPatch(srcAddr, out.gpr());
|
|
break;
|
|
case Scalar::Float32:
|
|
vmovssWithPatch(srcAddr, out.fpu());
|
|
break;
|
|
case Scalar::Float64:
|
|
vmovsdWithPatch(srcAddr, out.fpu());
|
|
break;
|
|
case Scalar::Float32x4:
|
|
switch (access.numSimdElems()) {
|
|
// In memory-to-register mode, movss zeroes out the high lanes.
|
|
case 1: vmovssWithPatch(srcAddr, out.fpu()); break;
|
|
// See comment above, which also applies to movsd.
|
|
case 2: vmovsdWithPatch(srcAddr, out.fpu()); break;
|
|
case 4: vmovupsWithPatch(srcAddr, out.fpu()); break;
|
|
default: MOZ_CRASH("unexpected size for partial load");
|
|
}
|
|
break;
|
|
case Scalar::Int32x4:
|
|
switch (access.numSimdElems()) {
|
|
// In memory-to-register mode, movd zeroes out the high lanes.
|
|
case 1: vmovdWithPatch(srcAddr, out.fpu()); break;
|
|
// See comment above, which also applies to movq.
|
|
case 2: vmovqWithPatch(srcAddr, out.fpu()); break;
|
|
case 4: vmovdquWithPatch(srcAddr, out.fpu()); break;
|
|
default: MOZ_CRASH("unexpected size for partial load");
|
|
}
|
|
break;
|
|
case Scalar::Int8x16:
|
|
MOZ_ASSERT(access.numSimdElems() == 16, "unexpected partial load");
|
|
vmovdquWithPatch(srcAddr, out.fpu());
|
|
break;
|
|
case Scalar::Int16x8:
|
|
MOZ_ASSERT(access.numSimdElems() == 8, "unexpected partial load");
|
|
vmovdquWithPatch(srcAddr, out.fpu());
|
|
break;
|
|
case Scalar::Int64:
|
|
case Scalar::BigInt64:
|
|
case Scalar::BigUint64:
|
|
case Scalar::Uint8Clamped:
|
|
case Scalar::MaxTypedArrayViewType:
|
|
MOZ_CRASH("unexpected type");
|
|
}
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
memoryBarrier(access.barrierAfter());
|
|
}
|
|
|
|
void
|
|
MacroAssembler::wasmLoadI64(const wasm::MemoryAccessDesc& access, Operand srcAddr, Register64 out)
|
|
{
|
|
MOZ_ASSERT(!access.isAtomic());
|
|
MOZ_ASSERT(!access.isSimd());
|
|
|
|
size_t loadOffset = size();
|
|
switch (access.type()) {
|
|
case Scalar::Int8:
|
|
MOZ_ASSERT(out == Register64(edx, eax));
|
|
movsblWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
cdq();
|
|
break;
|
|
case Scalar::Uint8:
|
|
movzblWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
xorl(out.high, out.high);
|
|
break;
|
|
case Scalar::Int16:
|
|
MOZ_ASSERT(out == Register64(edx, eax));
|
|
movswlWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
cdq();
|
|
break;
|
|
case Scalar::Uint16:
|
|
movzwlWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
xorl(out.high, out.high);
|
|
break;
|
|
case Scalar::Int32:
|
|
MOZ_ASSERT(out == Register64(edx, eax));
|
|
movlWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
cdq();
|
|
break;
|
|
case Scalar::Uint32:
|
|
movlWithPatch(srcAddr, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
xorl(out.high, out.high);
|
|
break;
|
|
case Scalar::Int64:
|
|
if (srcAddr.kind() == Operand::MEM_ADDRESS32) {
|
|
Operand low(PatchedAbsoluteAddress(uint32_t(srcAddr.address()) + INT64LOW_OFFSET));
|
|
Operand high(PatchedAbsoluteAddress(uint32_t(srcAddr.address()) + INT64HIGH_OFFSET));
|
|
|
|
movlWithPatch(low, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
loadOffset = size();
|
|
movlWithPatch(high, out.high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
} else {
|
|
MOZ_ASSERT(srcAddr.kind() == Operand::MEM_REG_DISP);
|
|
Address addr = srcAddr.toAddress();
|
|
Operand low(addr.base, addr.offset + INT64LOW_OFFSET);
|
|
Operand high(addr.base, addr.offset + INT64HIGH_OFFSET);
|
|
|
|
if (addr.base != out.low) {
|
|
movlWithPatch(low, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
loadOffset = size();
|
|
movlWithPatch(high, out.high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
} else {
|
|
MOZ_ASSERT(addr.base != out.high);
|
|
movlWithPatch(high, out.high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
|
|
loadOffset = size();
|
|
movlWithPatch(low, out.low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, loadOffset, framePushed());
|
|
}
|
|
}
|
|
break;
|
|
case Scalar::Float32:
|
|
case Scalar::Float64:
|
|
case Scalar::Float32x4:
|
|
case Scalar::Int8x16:
|
|
case Scalar::Int16x8:
|
|
case Scalar::Int32x4:
|
|
MOZ_CRASH("non-int64 loads should use load()");
|
|
case Scalar::BigInt64:
|
|
case Scalar::BigUint64:
|
|
case Scalar::Uint8Clamped:
|
|
case Scalar::MaxTypedArrayViewType:
|
|
MOZ_CRASH("unexpected array type");
|
|
}
|
|
}
|
|
|
|
void
|
|
MacroAssembler::wasmStore(const wasm::MemoryAccessDesc& access, AnyRegister value, Operand dstAddr)
|
|
{
|
|
memoryBarrier(access.barrierBefore());
|
|
|
|
size_t storeOffset = size();
|
|
switch (access.type()) {
|
|
case Scalar::Int8:
|
|
case Scalar::Uint8Clamped:
|
|
case Scalar::Uint8:
|
|
movbWithPatch(value.gpr(), dstAddr);
|
|
break;
|
|
case Scalar::Int16:
|
|
case Scalar::Uint16:
|
|
movwWithPatch(value.gpr(), dstAddr);
|
|
break;
|
|
case Scalar::Int32:
|
|
case Scalar::Uint32:
|
|
movlWithPatch(value.gpr(), dstAddr);
|
|
break;
|
|
case Scalar::Float32:
|
|
vmovssWithPatch(value.fpu(), dstAddr);
|
|
break;
|
|
case Scalar::Float64:
|
|
vmovsdWithPatch(value.fpu(), dstAddr);
|
|
break;
|
|
case Scalar::Float32x4:
|
|
switch (access.numSimdElems()) {
|
|
// In memory-to-register mode, movss zeroes out the high lanes.
|
|
case 1: vmovssWithPatch(value.fpu(), dstAddr); break;
|
|
// See comment above, which also applies to movsd.
|
|
case 2: vmovsdWithPatch(value.fpu(), dstAddr); break;
|
|
case 4: vmovupsWithPatch(value.fpu(), dstAddr); break;
|
|
default: MOZ_CRASH("unexpected size for partial load");
|
|
}
|
|
break;
|
|
case Scalar::Int32x4:
|
|
switch (access.numSimdElems()) {
|
|
// In memory-to-register mode, movd zeroes out the high lanes.
|
|
case 1: vmovdWithPatch(value.fpu(), dstAddr); break;
|
|
// See comment above, which also applies to movsd.
|
|
case 2: vmovqWithPatch(value.fpu(), dstAddr); break;
|
|
case 4: vmovdquWithPatch(value.fpu(), dstAddr); break;
|
|
default: MOZ_CRASH("unexpected size for partial load");
|
|
}
|
|
break;
|
|
case Scalar::Int8x16:
|
|
MOZ_ASSERT(access.numSimdElems() == 16, "unexpected partial store");
|
|
vmovdquWithPatch(value.fpu(), dstAddr);
|
|
break;
|
|
case Scalar::Int16x8:
|
|
MOZ_ASSERT(access.numSimdElems() == 8, "unexpected partial store");
|
|
vmovdquWithPatch(value.fpu(), dstAddr);
|
|
break;
|
|
case Scalar::Int64:
|
|
MOZ_CRASH("Should be handled in storeI64.");
|
|
case Scalar::MaxTypedArrayViewType:
|
|
case Scalar::BigInt64:
|
|
case Scalar::BigUint64:
|
|
MOZ_CRASH("unexpected type");
|
|
}
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
|
|
memoryBarrier(access.barrierAfter());
|
|
}
|
|
|
|
void
|
|
MacroAssembler::wasmStoreI64(const wasm::MemoryAccessDesc& access, Register64 value, Operand dstAddr)
|
|
{
|
|
MOZ_ASSERT(!access.isAtomic());
|
|
MOZ_ASSERT(!access.isSimd());
|
|
|
|
size_t storeOffset = size();
|
|
if (dstAddr.kind() == Operand::MEM_ADDRESS32) {
|
|
Operand low(PatchedAbsoluteAddress(uint32_t(dstAddr.address()) + INT64LOW_OFFSET));
|
|
Operand high(PatchedAbsoluteAddress(uint32_t(dstAddr.address()) + INT64HIGH_OFFSET));
|
|
|
|
movlWithPatch(value.low, low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
|
|
storeOffset = size();
|
|
movlWithPatch(value.high, high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
} else {
|
|
MOZ_ASSERT(dstAddr.kind() == Operand::MEM_REG_DISP);
|
|
Address addr = dstAddr.toAddress();
|
|
Operand low(addr.base, addr.offset + INT64LOW_OFFSET);
|
|
Operand high(addr.base, addr.offset + INT64HIGH_OFFSET);
|
|
|
|
if (addr.base != value.low) {
|
|
movlWithPatch(value.low, low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
|
|
storeOffset = size();
|
|
movlWithPatch(value.high, high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
} else {
|
|
MOZ_ASSERT(addr.base != value.high);
|
|
|
|
movlWithPatch(value.high, high);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
|
|
storeOffset = size();
|
|
movlWithPatch(value.low, low);
|
|
append(wasm::MemoryPatch(size()));
|
|
append(access, storeOffset, framePushed());
|
|
}
|
|
}
|
|
}
|
|
|
|
void
|
|
MacroAssembler::wasmTruncateDoubleToUInt32(FloatRegister input, Register output, Label* oolEntry)
|
|
{
|
|
Label done;
|
|
vcvttsd2si(input, output);
|
|
branch32(Assembler::Condition::NotSigned, output, Imm32(0), &done);
|
|
|
|
loadConstantDouble(double(int32_t(0x80000000)), ScratchDoubleReg);
|
|
addDouble(input, ScratchDoubleReg);
|
|
vcvttsd2si(ScratchDoubleReg, output);
|
|
|
|
branch32(Assembler::Condition::Signed, output, Imm32(0), oolEntry);
|
|
or32(Imm32(0x80000000), output);
|
|
|
|
bind(&done);
|
|
}
|
|
|
|
void
|
|
MacroAssembler::wasmTruncateFloat32ToUInt32(FloatRegister input, Register output, Label* oolEntry)
|
|
{
|
|
Label done;
|
|
vcvttss2si(input, output);
|
|
branch32(Assembler::Condition::NotSigned, output, Imm32(0), &done);
|
|
|
|
loadConstantFloat32(float(int32_t(0x80000000)), ScratchFloat32Reg);
|
|
addFloat32(input, ScratchFloat32Reg);
|
|
vcvttss2si(ScratchFloat32Reg, output);
|
|
|
|
branch32(Assembler::Condition::Signed, output, Imm32(0), oolEntry);
|
|
or32(Imm32(0x80000000), output);
|
|
|
|
bind(&done);
|
|
}
|
|
|
|
//}}} check_macroassembler_style
|
|
|
|
void
|
|
MacroAssemblerX86::convertInt64ToDouble(Register64 input, FloatRegister output)
|
|
{
|
|
// Zero the output register to break dependencies, see convertInt32ToDouble.
|
|
zeroDouble(output);
|
|
|
|
asMasm().Push(input.high);
|
|
asMasm().Push(input.low);
|
|
fild(Operand(esp, 0));
|
|
|
|
fstp(Operand(esp, 0));
|
|
vmovsd(Address(esp, 0), output);
|
|
asMasm().freeStack(2*sizeof(intptr_t));
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::convertInt64ToFloat32(Register64 input, FloatRegister output)
|
|
{
|
|
convertInt64ToDouble(input, output);
|
|
convertDoubleToFloat32(output, output);
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::convertUInt64ToFloat32(Register64 input, FloatRegister output, Register temp)
|
|
{
|
|
convertUInt64ToDouble(input, output.asDouble(), temp);
|
|
convertDoubleToFloat32(output, output);
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::wasmTruncateDoubleToInt64(FloatRegister input, Register64 output, Label* oolEntry,
|
|
Label* oolRejoin, FloatRegister tempReg)
|
|
{
|
|
Label fail, convert;
|
|
Register temp = output.high;
|
|
|
|
// Make sure input fits in (u)int64.
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeDouble(input, Operand(esp, 0));
|
|
asMasm().branchDoubleNotInInt64Range(Address(esp, 0), temp, &fail);
|
|
jump(&convert);
|
|
|
|
// Handle failure in ool.
|
|
bind(&fail);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
jump(oolEntry);
|
|
bind(oolRejoin);
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeDouble(input, Operand(esp, 0));
|
|
|
|
// Convert the double/float to int64.
|
|
bind(&convert);
|
|
asMasm().truncateDoubleToInt64(Address(esp, 0), Address(esp, 0), temp);
|
|
|
|
// Load value into int64 register.
|
|
load64(Address(esp, 0), output);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::wasmTruncateFloat32ToInt64(FloatRegister input, Register64 output, Label* oolEntry,
|
|
Label* oolRejoin, FloatRegister tempReg)
|
|
{
|
|
Label fail, convert;
|
|
Register temp = output.high;
|
|
|
|
// Make sure input fits in (u)int64.
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeFloat32(input, Operand(esp, 0));
|
|
asMasm().branchFloat32NotInInt64Range(Address(esp, 0), temp, &fail);
|
|
jump(&convert);
|
|
|
|
// Handle failure in ool.
|
|
bind(&fail);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
jump(oolEntry);
|
|
bind(oolRejoin);
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeFloat32(input, Operand(esp, 0));
|
|
|
|
// Convert the double/float to int64.
|
|
bind(&convert);
|
|
asMasm().truncateFloat32ToInt64(Address(esp, 0), Address(esp, 0), temp);
|
|
|
|
// Load value into int64 register.
|
|
load64(Address(esp, 0), output);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::wasmTruncateDoubleToUInt64(FloatRegister input, Register64 output, Label* oolEntry,
|
|
Label* oolRejoin, FloatRegister tempReg)
|
|
{
|
|
Label fail, convert;
|
|
Register temp = output.high;
|
|
|
|
// Make sure input fits in (u)int64.
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeDouble(input, Operand(esp, 0));
|
|
asMasm().branchDoubleNotInUInt64Range(Address(esp, 0), temp, &fail);
|
|
jump(&convert);
|
|
|
|
// Handle failure in ool.
|
|
bind(&fail);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
jump(oolEntry);
|
|
bind(oolRejoin);
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeDouble(input, Operand(esp, 0));
|
|
|
|
// Convert the double/float to int64.
|
|
bind(&convert);
|
|
asMasm().truncateDoubleToUInt64(Address(esp, 0), Address(esp, 0), temp, tempReg);
|
|
|
|
// Load value into int64 register.
|
|
load64(Address(esp, 0), output);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
}
|
|
|
|
void
|
|
MacroAssemblerX86::wasmTruncateFloat32ToUInt64(FloatRegister input, Register64 output, Label* oolEntry,
|
|
Label* oolRejoin, FloatRegister tempReg)
|
|
{
|
|
Label fail, convert;
|
|
Register temp = output.high;
|
|
|
|
// Make sure input fits in (u)int64.
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeFloat32(input, Operand(esp, 0));
|
|
asMasm().branchFloat32NotInUInt64Range(Address(esp, 0), temp, &fail);
|
|
jump(&convert);
|
|
|
|
// Handle failure in ool.
|
|
bind(&fail);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
jump(oolEntry);
|
|
bind(oolRejoin);
|
|
asMasm().reserveStack(2 * sizeof(int32_t));
|
|
asMasm().storeFloat32(input, Operand(esp, 0));
|
|
|
|
// Convert the double/float to int64.
|
|
bind(&convert);
|
|
asMasm().truncateFloat32ToUInt64(Address(esp, 0), Address(esp, 0), temp, tempReg);
|
|
|
|
// Load value into int64 register.
|
|
load64(Address(esp, 0), output);
|
|
asMasm().freeStack(2 * sizeof(int32_t));
|
|
}
|
|
|