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Import aom library
This is the reference implementation for the Alliance for Open Media's av1 video code. The commit used was 4d668d7feb1f8abd809d1bca0418570a7f142a36.
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256
third_party/aom/av1/common/av1_inv_txfm2d.c
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third_party/aom/av1/common/av1_inv_txfm2d.c
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/*
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* Copyright (c) 2016, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include "./av1_rtcd.h"
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#include "av1/common/enums.h"
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#include "av1/common/av1_txfm.h"
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#include "av1/common/av1_inv_txfm1d.h"
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#include "av1/common/av1_inv_txfm2d_cfg.h"
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static INLINE TxfmFunc inv_txfm_type_to_func(TXFM_TYPE txfm_type) {
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switch (txfm_type) {
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case TXFM_TYPE_DCT4: return av1_idct4_new;
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case TXFM_TYPE_DCT8: return av1_idct8_new;
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case TXFM_TYPE_DCT16: return av1_idct16_new;
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case TXFM_TYPE_DCT32: return av1_idct32_new;
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case TXFM_TYPE_ADST4: return av1_iadst4_new;
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case TXFM_TYPE_ADST8: return av1_iadst8_new;
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case TXFM_TYPE_ADST16: return av1_iadst16_new;
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case TXFM_TYPE_ADST32: return av1_iadst32_new;
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default: assert(0); return NULL;
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}
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}
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const TXFM_2D_CFG *inv_txfm_cfg_ls[TX_TYPES][TX_SIZES] = {
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// DCT_DCT
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_dct_dct_4, &inv_txfm_2d_cfg_dct_dct_8,
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&inv_txfm_2d_cfg_dct_dct_16, &inv_txfm_2d_cfg_dct_dct_32 },
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// ADST_DCT
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_dct_4, &inv_txfm_2d_cfg_adst_dct_8,
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&inv_txfm_2d_cfg_adst_dct_16, &inv_txfm_2d_cfg_adst_dct_32 },
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// DCT_ADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_dct_adst_4, &inv_txfm_2d_cfg_dct_adst_8,
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&inv_txfm_2d_cfg_dct_adst_16, &inv_txfm_2d_cfg_dct_adst_32 },
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// ADST_ADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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#if CONFIG_EXT_TX
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// FLIPADST_DCT
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_dct_4, &inv_txfm_2d_cfg_adst_dct_8,
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&inv_txfm_2d_cfg_adst_dct_16, &inv_txfm_2d_cfg_adst_dct_32 },
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// DCT_FLIPADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_dct_adst_4, &inv_txfm_2d_cfg_dct_adst_8,
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&inv_txfm_2d_cfg_dct_adst_16, &inv_txfm_2d_cfg_dct_adst_32 },
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// FLIPADST_FLIPADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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// ADST_FLIPADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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// FLIPADST_ADST
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{
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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{ // IDTX
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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{ // V_DCT
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_dct_adst_4, &inv_txfm_2d_cfg_dct_adst_8,
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&inv_txfm_2d_cfg_dct_adst_16, &inv_txfm_2d_cfg_dct_adst_32 },
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{ // H_DCT
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_dct_4, &inv_txfm_2d_cfg_adst_dct_8,
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&inv_txfm_2d_cfg_adst_dct_16, &inv_txfm_2d_cfg_adst_dct_32 },
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{ // V_ADST
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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{ // H_ADST
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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{ // V_FLIP_ADST
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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{ // H_FLIP_ADST
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#if CONFIG_CB4X4
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NULL,
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#endif
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&inv_txfm_2d_cfg_adst_adst_4, &inv_txfm_2d_cfg_adst_adst_8,
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&inv_txfm_2d_cfg_adst_adst_16, &inv_txfm_2d_cfg_adst_adst_32 },
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#endif // CONFIG_EXT_TX
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};
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TXFM_2D_FLIP_CFG av1_get_inv_txfm_cfg(int tx_type, int tx_size) {
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TXFM_2D_FLIP_CFG cfg;
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set_flip_cfg(tx_type, &cfg);
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cfg.cfg = inv_txfm_cfg_ls[tx_type][tx_size];
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return cfg;
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}
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TXFM_2D_FLIP_CFG av1_get_inv_txfm_64x64_cfg(int tx_type) {
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TXFM_2D_FLIP_CFG cfg = { 0, 0, NULL };
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switch (tx_type) {
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case DCT_DCT:
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cfg.cfg = &inv_txfm_2d_cfg_dct_dct_64;
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set_flip_cfg(tx_type, &cfg);
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break;
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default: assert(0);
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}
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return cfg;
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}
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static INLINE void inv_txfm2d_add_c(const int32_t *input, int16_t *output,
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int stride, TXFM_2D_FLIP_CFG *cfg,
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int32_t *txfm_buf) {
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const int txfm_size = cfg->cfg->txfm_size;
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const int8_t *shift = cfg->cfg->shift;
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const int8_t *stage_range_col = cfg->cfg->stage_range_col;
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const int8_t *stage_range_row = cfg->cfg->stage_range_row;
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const int8_t *cos_bit_col = cfg->cfg->cos_bit_col;
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const int8_t *cos_bit_row = cfg->cfg->cos_bit_row;
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const TxfmFunc txfm_func_col = inv_txfm_type_to_func(cfg->cfg->txfm_type_col);
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const TxfmFunc txfm_func_row = inv_txfm_type_to_func(cfg->cfg->txfm_type_row);
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// txfm_buf's length is txfm_size * txfm_size + 2 * txfm_size
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// it is used for intermediate data buffering
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int32_t *temp_in = txfm_buf;
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int32_t *temp_out = temp_in + txfm_size;
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int32_t *buf = temp_out + txfm_size;
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int32_t *buf_ptr = buf;
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int c, r;
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// Rows
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for (r = 0; r < txfm_size; ++r) {
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txfm_func_row(input, buf_ptr, cos_bit_row, stage_range_row);
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round_shift_array(buf_ptr, txfm_size, -shift[0]);
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input += txfm_size;
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buf_ptr += txfm_size;
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}
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// Columns
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for (c = 0; c < txfm_size; ++c) {
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if (cfg->lr_flip == 0) {
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for (r = 0; r < txfm_size; ++r) temp_in[r] = buf[r * txfm_size + c];
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} else {
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// flip left right
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for (r = 0; r < txfm_size; ++r)
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temp_in[r] = buf[r * txfm_size + (txfm_size - c - 1)];
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}
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txfm_func_col(temp_in, temp_out, cos_bit_col, stage_range_col);
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round_shift_array(temp_out, txfm_size, -shift[1]);
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if (cfg->ud_flip == 0) {
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for (r = 0; r < txfm_size; ++r) output[r * stride + c] += temp_out[r];
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} else {
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// flip upside down
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for (r = 0; r < txfm_size; ++r)
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output[r * stride + c] += temp_out[txfm_size - r - 1];
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}
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}
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}
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static INLINE void inv_txfm2d_add_facade(const int32_t *input, uint16_t *output,
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int stride, int32_t *txfm_buf,
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int tx_type, int tx_size, int bd) {
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// output contains the prediction signal which is always positive and smaller
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// than (1 << bd) - 1
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// since bd < 16-1, therefore we can treat the uint16_t* output buffer as an
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// int16_t*
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TXFM_2D_FLIP_CFG cfg = av1_get_inv_txfm_cfg(tx_type, tx_size);
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inv_txfm2d_add_c(input, (int16_t *)output, stride, &cfg, txfm_buf);
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clamp_block((int16_t *)output, cfg.cfg->txfm_size, stride, 0, (1 << bd) - 1);
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}
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void av1_inv_txfm2d_add_4x4_c(const int32_t *input, uint16_t *output,
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int stride, int tx_type, int bd) {
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int txfm_buf[4 * 4 + 4 + 4];
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inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_4X4, bd);
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}
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void av1_inv_txfm2d_add_8x8_c(const int32_t *input, uint16_t *output,
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int stride, int tx_type, int bd) {
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int txfm_buf[8 * 8 + 8 + 8];
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inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_8X8, bd);
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}
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void av1_inv_txfm2d_add_16x16_c(const int32_t *input, uint16_t *output,
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int stride, int tx_type, int bd) {
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int txfm_buf[16 * 16 + 16 + 16];
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inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_16X16, bd);
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}
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void av1_inv_txfm2d_add_32x32_c(const int32_t *input, uint16_t *output,
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int stride, int tx_type, int bd) {
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int txfm_buf[32 * 32 + 32 + 32];
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inv_txfm2d_add_facade(input, output, stride, txfm_buf, tx_type, TX_32X32, bd);
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}
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void av1_inv_txfm2d_add_64x64_c(const int32_t *input, uint16_t *output,
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int stride, int tx_type, int bd) {
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int txfm_buf[64 * 64 + 64 + 64];
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// output contains the prediction signal which is always positive and smaller
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// than (1 << bd) - 1
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// since bd < 16-1, therefore we can treat the uint16_t* output buffer as an
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// int16_t*
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TXFM_2D_FLIP_CFG cfg = av1_get_inv_txfm_64x64_cfg(tx_type);
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inv_txfm2d_add_c(input, (int16_t *)output, stride, &cfg, txfm_buf);
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clamp_block((int16_t *)output, 64, stride, 0, (1 << bd) - 1);
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}
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