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Issue #2354 - Restore ARM32 buildability on Linux. Fix ION breakages due to BigInt changes. Fix breakages from libjpeg, libyuv and libvpx upgrades. Restore ARM(32/64) NEON FPU support in libyuv.
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7 changed files with 35 additions and 25 deletions
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@ -288,24 +288,6 @@ class CodeGeneratorARM : public CodeGeneratorShared
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void visitUDiv(LUDiv* ins);
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void visitUMod(LUMod* ins);
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void visitSoftUDivOrMod(LSoftUDivOrMod* ins);
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public:
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// Unimplemented SIMD instructions
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void visitSimdSplatX4(LSimdSplatX4* lir) { MOZ_CRASH("NYI"); }
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void visitSimd128Int(LSimd128Int* ins) { MOZ_CRASH("NYI"); }
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void visitSimd128Float(LSimd128Float* ins) { MOZ_CRASH("NYI"); }
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void visitSimdReinterpretCast(LSimdReinterpretCast* ins) { MOZ_CRASH("NYI"); }
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void visitSimdExtractElementI(LSimdExtractElementI* ins) { MOZ_CRASH("NYI"); }
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void visitSimdExtractElementF(LSimdExtractElementF* ins) { MOZ_CRASH("NYI"); }
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void visitSimdGeneralShuffleI(LSimdGeneralShuffleI* lir) { MOZ_CRASH("NYI"); }
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void visitSimdGeneralShuffleF(LSimdGeneralShuffleF* lir) { MOZ_CRASH("NYI"); }
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void visitSimdSwizzleI(LSimdSwizzleI* lir) { MOZ_CRASH("NYI"); }
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void visitSimdSwizzleF(LSimdSwizzleF* lir) { MOZ_CRASH("NYI"); }
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void visitSimdBinaryCompIx4(LSimdBinaryCompIx4* lir) { MOZ_CRASH("NYI"); }
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void visitSimdBinaryCompFx4(LSimdBinaryCompFx4* lir) { MOZ_CRASH("NYI"); }
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void visitSimdBinaryArithIx4(LSimdBinaryArithIx4* lir) { MOZ_CRASH("NYI"); }
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void visitSimdBinaryArithFx4(LSimdBinaryArithFx4* lir) { MOZ_CRASH("NYI"); }
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void visitSimdBinaryBitwise(LSimdBinaryBitwise* lir) { MOZ_CRASH("NYI"); }
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};
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typedef CodeGeneratorARM CodeGeneratorSpecific;
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@ -3013,7 +3013,7 @@ MacroAssemblerARMCompat::testInt32(Condition cond, const BaseIndex& src)
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return cond;
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}
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+Assembler::Condition
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Assembler::Condition
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MacroAssemblerARMCompat::testBigInt(Condition cond,const BaseIndex& src)
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{
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MOZ_ASSERT(cond == Equal || cond == NotEqual);
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@ -3766,7 +3766,7 @@ MacroAssemblerARMCompat::testStringTruthy(bool truthy, const ValueOperand& value
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return truthy ? Assembler::NotEqual : Assembler::Equal;
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}
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+Assembler::Condition
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Assembler::Condition
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MacroAssemblerARMCompat::testBigIntTruthy(bool truthy, const ValueOperand& value)
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{
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Register bi = value.payloadReg();
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@ -201,6 +201,17 @@ ICUnaryArith_Int32::Compiler::generateStubCode(MacroAssembler& masm)
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// Compile -x as 0 - x.
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masm.as_rsb(R0.payloadReg(), R0.payloadReg(), Imm8(0));
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break;
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case JSOP_INC: {
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RegisterOrInt32Constant rval = RegisterOrInt32Constant(R0.payloadReg());
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masm.inc32(&rval);
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break;
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}
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case JSOP_DEC: {
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RegisterOrInt32Constant rval = RegisterOrInt32Constant(R0.payloadReg());
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masm.dec32(&rval);
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break;
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}
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default:
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MOZ_CRASH("Unexpected op");
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}
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