Issue #2307 - Part 1: Extend masm with the pmovmskb SSE2 instruction.

This commit is contained in:
Moonchild 2023-09-12 23:26:44 +02:00 • committed by roytam1
commit ba51ff6a74
3 changed files with 11 additions and 0 deletions

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@ -2275,6 +2275,10 @@ class AssemblerX86Shared : public AssemblerShared
MOZ_ASSERT(HasSSE2()); MOZ_ASSERT(HasSSE2());
masm.vmovmskps_rr(src.encoding(), dest.encoding()); masm.vmovmskps_rr(src.encoding(), dest.encoding());
} }
void vpmovmskb(FloatRegister src, Register dest) {
MOZ_ASSERT(HasSSE2());
masm.vpmovmskb_rr(src.encoding(), dest.encoding());
}
void vptest(FloatRegister rhs, FloatRegister lhs) { void vptest(FloatRegister rhs, FloatRegister lhs) {
MOZ_ASSERT(HasSSE41()); MOZ_ASSERT(HasSSE41());
masm.vptest_rr(rhs.encoding(), lhs.encoding()); masm.vptest_rr(rhs.encoding(), lhs.encoding());

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@ -2,6 +2,7 @@
* *
* ***** BEGIN LICENSE BLOCK ***** * ***** BEGIN LICENSE BLOCK *****
* Copyright (C) 2008 Apple Inc. All rights reserved. * Copyright (C) 2008 Apple Inc. All rights reserved.
* Portions Copyright (C) 2022, 2023 Moonchild Productions.
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
@ -3051,6 +3052,11 @@ public:
twoByteOpSimdInt32("vmovmskps", VEX_PS, OP2_MOVMSKPD_EdVd, src, dst); twoByteOpSimdInt32("vmovmskps", VEX_PS, OP2_MOVMSKPD_EdVd, src, dst);
} }
void vpmovmskb_rr(XMMRegisterID src, RegisterID dst)
{
twoByteOpSimdInt32("vpmovmskb", VEX_PD, OP2_PMOVMSKB_EdVd, src, dst);
}
void vptest_rr(XMMRegisterID rhs, XMMRegisterID lhs) { void vptest_rr(XMMRegisterID rhs, XMMRegisterID lhs) {
threeByteOpSimd("vptest", VEX_PD, OP3_PTEST_VdVd, ESCAPE_38, rhs, invalid_xmm, lhs); threeByteOpSimd("vptest", VEX_PD, OP3_PTEST_VdVd, ESCAPE_38, rhs, invalid_xmm, lhs);
} }

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@ -265,6 +265,7 @@ enum TwoByteOpcodeID {
OP2_PSRLD_VdqWdq = 0xD2, OP2_PSRLD_VdqWdq = 0xD2,
OP2_PMULLW_VdqWdq = 0xD5, OP2_PMULLW_VdqWdq = 0xD5,
OP2_MOVQ_WdVd = 0xD6, OP2_MOVQ_WdVd = 0xD6,
OP2_PMOVMSKB_EdVd = 0xD7,
OP2_PSUBUSB_VdqWdq = 0xD8, OP2_PSUBUSB_VdqWdq = 0xD8,
OP2_PSUBUSW_VdqWdq = 0xD9, OP2_PSUBUSW_VdqWdq = 0xD9,
OP2_PANDDQ_VdqWdq = 0xDB, OP2_PANDDQ_VdqWdq = 0xDB,