mirror of
https://repo.dactyloidae.xyz/Dactyloidae/UXP.git
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Performance improvements jit
1322724: IonMonkey - Add the hit count information on the extra false branch blocks 1322932: IonMonkey - Only iterate the backedge of the inner-loop when it has already be visited 1329901 - Remove expensive isObservableOperand() loop guards. 1330667: IonMonkey - Create a new constant for every optimized arguments use. 1342016 - Fast-path for isObservableSlot(). 1388045 - Branch Pruning: Check the compile info associated with the resume point.
This commit is contained in:
win7-7
wuggy
parent
8a82d779d7
commit
5eb6f53b0d
8 changed files with 7759 additions and 6 deletions
File diff suppressed because it is too large
Load diff
2463
js/src/jit/CacheIRCompiler.cpp
Normal file
2463
js/src/jit/CacheIRCompiler.cpp
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File diff suppressed because it is too large
Load diff
752
js/src/jit/CacheIRCompiler.h
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752
js/src/jit/CacheIRCompiler.h
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/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 4 -*-
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* vim: set ts=8 sts=4 et sw=4 tw=99:
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#ifndef jit_CacheIRCompiler_h
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#define jit_CacheIRCompiler_h
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#include "jit/CacheIR.h"
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namespace js {
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namespace jit {
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// The ops below are defined in CacheIRCompiler and codegen is shared between
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// BaselineCacheIRCompiler and IonCacheIRCompiler.
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#define CACHE_IR_SHARED_OPS(_) \
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_(GuardIsObject) \
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_(GuardIsObjectOrNull) \
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_(GuardIsString) \
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_(GuardIsSymbol) \
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_(GuardIsInt32Index) \
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_(GuardType) \
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_(GuardClass) \
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_(GuardIsNativeFunction) \
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_(GuardIsProxy) \
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_(GuardIsCrossCompartmentWrapper) \
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_(GuardNotDOMProxy) \
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_(GuardSpecificInt32Immediate) \
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_(GuardMagicValue) \
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_(GuardNoUnboxedExpando) \
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_(GuardAndLoadUnboxedExpando) \
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_(GuardNoDetachedTypedObjects) \
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_(GuardNoDenseElements) \
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_(GuardAndGetIndexFromString) \
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_(LoadProto) \
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_(LoadEnclosingEnvironment) \
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_(LoadWrapperTarget) \
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_(LoadDOMExpandoValue) \
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_(LoadDOMExpandoValueIgnoreGeneration)\
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_(LoadUndefinedResult) \
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_(LoadBooleanResult) \
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_(LoadInt32ArrayLengthResult) \
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_(LoadUnboxedArrayLengthResult) \
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_(LoadArgumentsObjectLengthResult) \
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_(LoadFunctionLengthResult) \
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_(LoadStringLengthResult) \
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_(LoadStringCharResult) \
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_(LoadArgumentsObjectArgResult) \
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_(LoadDenseElementResult) \
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_(LoadDenseElementHoleResult) \
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_(LoadDenseElementExistsResult) \
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_(LoadDenseElementHoleExistsResult) \
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_(LoadUnboxedArrayElementResult) \
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_(LoadTypedElementResult) \
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_(LoadObjectResult) \
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_(LoadTypeOfObjectResult) \
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_(CallPrintString) \
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_(Breakpoint) \
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_(MegamorphicLoadSlotByValueResult) \
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_(MegamorphicHasOwnResult) \
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_(WrapResult)
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// Represents a Value on the Baseline frame's expression stack. Slot 0 is the
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// value on top of the stack (the most recently pushed value), slot 1 is the
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// value pushed before that, etc.
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class BaselineFrameSlot
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{
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uint32_t slot_;
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public:
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explicit BaselineFrameSlot(uint32_t slot) : slot_(slot) {}
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uint32_t slot() const { return slot_; }
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bool operator==(const BaselineFrameSlot& other) const { return slot_ == other.slot_; }
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bool operator!=(const BaselineFrameSlot& other) const { return slot_ != other.slot_; }
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};
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// OperandLocation represents the location of an OperandId. The operand is
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// either in a register or on the stack, and is either boxed or unboxed.
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class OperandLocation
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{
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public:
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enum Kind {
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Uninitialized = 0,
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PayloadReg,
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DoubleReg,
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ValueReg,
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PayloadStack,
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ValueStack,
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BaselineFrame,
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Constant,
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};
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private:
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Kind kind_;
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union Data {
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struct {
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Register reg;
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JSValueType type;
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} payloadReg;
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FloatRegister doubleReg;
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ValueOperand valueReg;
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struct {
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uint32_t stackPushed;
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JSValueType type;
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} payloadStack;
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uint32_t valueStackPushed;
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BaselineFrameSlot baselineFrameSlot;
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Value constant;
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Data() : valueStackPushed(0) {}
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};
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Data data_;
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public:
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OperandLocation() : kind_(Uninitialized) {}
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Kind kind() const { return kind_; }
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void setUninitialized() {
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kind_ = Uninitialized;
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}
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ValueOperand valueReg() const {
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MOZ_ASSERT(kind_ == ValueReg);
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return data_.valueReg;
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}
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Register payloadReg() const {
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MOZ_ASSERT(kind_ == PayloadReg);
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return data_.payloadReg.reg;
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}
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FloatRegister doubleReg() const {
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MOZ_ASSERT(kind_ == DoubleReg);
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return data_.doubleReg;
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}
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uint32_t payloadStack() const {
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MOZ_ASSERT(kind_ == PayloadStack);
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return data_.payloadStack.stackPushed;
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}
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uint32_t valueStack() const {
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MOZ_ASSERT(kind_ == ValueStack);
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return data_.valueStackPushed;
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}
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JSValueType payloadType() const {
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if (kind_ == PayloadReg)
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return data_.payloadReg.type;
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MOZ_ASSERT(kind_ == PayloadStack);
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return data_.payloadStack.type;
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}
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Value constant() const {
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MOZ_ASSERT(kind_ == Constant);
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return data_.constant;
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}
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BaselineFrameSlot baselineFrameSlot() const {
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MOZ_ASSERT(kind_ == BaselineFrame);
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return data_.baselineFrameSlot;
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}
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void setPayloadReg(Register reg, JSValueType type) {
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kind_ = PayloadReg;
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data_.payloadReg.reg = reg;
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data_.payloadReg.type = type;
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}
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void setDoubleReg(FloatRegister reg) {
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kind_ = DoubleReg;
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data_.doubleReg = reg;
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}
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void setValueReg(ValueOperand reg) {
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kind_ = ValueReg;
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data_.valueReg = reg;
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}
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void setPayloadStack(uint32_t stackPushed, JSValueType type) {
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kind_ = PayloadStack;
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data_.payloadStack.stackPushed = stackPushed;
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data_.payloadStack.type = type;
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}
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void setValueStack(uint32_t stackPushed) {
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kind_ = ValueStack;
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data_.valueStackPushed = stackPushed;
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}
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void setConstant(const Value& v) {
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kind_ = Constant;
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data_.constant = v;
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}
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void setBaselineFrame(BaselineFrameSlot slot) {
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kind_ = BaselineFrame;
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data_.baselineFrameSlot = slot;
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}
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bool isInRegister() const { return kind_ == PayloadReg || kind_ == ValueReg; }
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bool isOnStack() const { return kind_ == PayloadStack || kind_ == ValueStack; }
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size_t stackPushed() const {
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if (kind_ == PayloadStack)
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return data_.payloadStack.stackPushed;
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MOZ_ASSERT(kind_ == ValueStack);
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return data_.valueStackPushed;
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}
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size_t stackSizeInBytes() const {
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if (kind_ == PayloadStack)
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return sizeof(uintptr_t);
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MOZ_ASSERT(kind_ == ValueStack);
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return sizeof(js::Value);
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}
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void adjustStackPushed(int32_t diff) {
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if (kind_ == PayloadStack) {
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data_.payloadStack.stackPushed += diff;
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return;
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}
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MOZ_ASSERT(kind_ == ValueStack);
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data_.valueStackPushed += diff;
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}
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bool aliasesReg(Register reg) const {
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if (kind_ == PayloadReg)
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return payloadReg() == reg;
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if (kind_ == ValueReg)
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return valueReg().aliases(reg);
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return false;
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}
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bool aliasesReg(ValueOperand reg) const {
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#if defined(JS_NUNBOX32)
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return aliasesReg(reg.typeReg()) || aliasesReg(reg.payloadReg());
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#else
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return aliasesReg(reg.valueReg());
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#endif
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}
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bool aliasesReg(const OperandLocation& other) const;
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bool operator==(const OperandLocation& other) const;
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bool operator!=(const OperandLocation& other) const { return !operator==(other); }
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};
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struct SpilledRegister
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{
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Register reg;
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uint32_t stackPushed;
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SpilledRegister(Register reg, uint32_t stackPushed)
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: reg(reg), stackPushed(stackPushed)
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{}
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bool operator==(const SpilledRegister& other) const {
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return reg == other.reg && stackPushed == other.stackPushed;
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}
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bool operator!=(const SpilledRegister& other) const { return !(*this == other); }
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};
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using SpilledRegisterVector = Vector<SpilledRegister, 2, SystemAllocPolicy>;
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// Class to track and allocate registers while emitting IC code.
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class MOZ_RAII CacheRegisterAllocator
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{
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// The original location of the inputs to the cache.
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Vector<OperandLocation, 4, SystemAllocPolicy> origInputLocations_;
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// The current location of each operand.
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Vector<OperandLocation, 8, SystemAllocPolicy> operandLocations_;
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// Free lists for value- and payload-slots on stack
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Vector<uint32_t, 2, SystemAllocPolicy> freeValueSlots_;
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Vector<uint32_t, 2, SystemAllocPolicy> freePayloadSlots_;
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// The registers allocated while emitting the current CacheIR op.
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// This prevents us from allocating a register and then immediately
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// clobbering it for something else, while we're still holding on to it.
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LiveGeneralRegisterSet currentOpRegs_;
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const AllocatableGeneralRegisterSet allocatableRegs_;
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// Registers that are currently unused and available.
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AllocatableGeneralRegisterSet availableRegs_;
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// Registers that are available, but before use they must be saved and
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// then restored when returning from the stub.
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AllocatableGeneralRegisterSet availableRegsAfterSpill_;
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// Registers we took from availableRegsAfterSpill_ and spilled to the stack.
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SpilledRegisterVector spilledRegs_;
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// The number of bytes pushed on the native stack.
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uint32_t stackPushed_;
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// The index of the CacheIR instruction we're currently emitting.
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uint32_t currentInstruction_;
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const CacheIRWriter& writer_;
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CacheRegisterAllocator(const CacheRegisterAllocator&) = delete;
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CacheRegisterAllocator& operator=(const CacheRegisterAllocator&) = delete;
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void freeDeadOperandLocations(MacroAssembler& masm);
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void spillOperandToStack(MacroAssembler& masm, OperandLocation* loc);
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void spillOperandToStackOrRegister(MacroAssembler& masm, OperandLocation* loc);
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void popPayload(MacroAssembler& masm, OperandLocation* loc, Register dest);
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void popValue(MacroAssembler& masm, OperandLocation* loc, ValueOperand dest);
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public:
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friend class AutoScratchRegister;
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friend class AutoScratchRegisterExcluding;
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explicit CacheRegisterAllocator(const CacheIRWriter& writer)
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: allocatableRegs_(GeneralRegisterSet::All()),
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stackPushed_(0),
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currentInstruction_(0),
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writer_(writer)
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{}
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[[nodiscard]] bool init();
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void initAvailableRegs(const AllocatableGeneralRegisterSet& available) {
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availableRegs_ = available;
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}
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void initAvailableRegsAfterSpill();
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void fixupAliasedInputs(MacroAssembler& masm);
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OperandLocation operandLocation(size_t i) const {
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return operandLocations_[i];
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}
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void setOperandLocation(size_t i, const OperandLocation& loc) {
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operandLocations_[i] = loc;
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}
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OperandLocation origInputLocation(size_t i) const {
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return origInputLocations_[i];
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}
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void initInputLocation(size_t i, ValueOperand reg) {
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origInputLocations_[i].setValueReg(reg);
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operandLocations_[i].setValueReg(reg);
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}
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void initInputLocation(size_t i, Register reg, JSValueType type) {
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origInputLocations_[i].setPayloadReg(reg, type);
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operandLocations_[i].setPayloadReg(reg, type);
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}
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void initInputLocation(size_t i, FloatRegister reg) {
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origInputLocations_[i].setDoubleReg(reg);
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operandLocations_[i].setDoubleReg(reg);
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}
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void initInputLocation(size_t i, const Value& v) {
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origInputLocations_[i].setConstant(v);
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operandLocations_[i].setConstant(v);
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}
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void initInputLocation(size_t i, BaselineFrameSlot slot) {
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origInputLocations_[i].setBaselineFrame(slot);
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operandLocations_[i].setBaselineFrame(slot);
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}
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void initInputLocation(size_t i, const TypedOrValueRegister& reg);
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void initInputLocation(size_t i, const ConstantOrRegister& value);
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const SpilledRegisterVector& spilledRegs() const { return spilledRegs_; }
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[[nodiscard]] bool setSpilledRegs(const SpilledRegisterVector& regs) {
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spilledRegs_.clear();
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return spilledRegs_.appendAll(regs);
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}
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void nextOp() {
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currentOpRegs_.clear();
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currentInstruction_++;
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}
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uint32_t stackPushed() const {
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return stackPushed_;
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}
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void setStackPushed(uint32_t pushed) {
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stackPushed_ = pushed;
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}
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bool isAllocatable(Register reg) const {
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return allocatableRegs_.has(reg);
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}
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// Allocates a new register.
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Register allocateRegister(MacroAssembler& masm);
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ValueOperand allocateValueRegister(MacroAssembler& masm);
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void allocateFixedRegister(MacroAssembler& masm, Register reg);
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void allocateFixedValueRegister(MacroAssembler& masm, ValueOperand reg);
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// Releases a register so it can be reused later.
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void releaseRegister(Register reg) {
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MOZ_ASSERT(currentOpRegs_.has(reg));
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availableRegs_.add(reg);
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currentOpRegs_.take(reg);
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}
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void releaseValueRegister(ValueOperand reg) {
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#ifdef JS_NUNBOX32
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releaseRegister(reg.payloadReg());
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releaseRegister(reg.typeReg());
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#else
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releaseRegister(reg.valueReg());
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#endif
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}
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// Removes spilled values from the native stack. This should only be
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// called after all registers have been allocated.
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void discardStack(MacroAssembler& masm);
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Address addressOf(MacroAssembler& masm, BaselineFrameSlot slot) const;
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// Returns the register for the given operand. If the operand is currently
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// not in a register, it will load it into one.
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ValueOperand useValueRegister(MacroAssembler& masm, ValOperandId val);
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ValueOperand useFixedValueRegister(MacroAssembler& masm, ValOperandId valId, ValueOperand reg);
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Register useRegister(MacroAssembler& masm, TypedOperandId typedId);
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ConstantOrRegister useConstantOrRegister(MacroAssembler& masm, ValOperandId val);
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// Allocates an output register for the given operand.
|
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Register defineRegister(MacroAssembler& masm, TypedOperandId typedId);
|
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ValueOperand defineValueRegister(MacroAssembler& masm, ValOperandId val);
|
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// Returns |val|'s JSValueType or JSVAL_TYPE_UNKNOWN.
|
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JSValueType knownType(ValOperandId val) const;
|
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|
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// Emits code to restore registers and stack to the state at the start of
|
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// the stub.
|
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void restoreInputState(MacroAssembler& masm, bool discardStack = true);
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|
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// Returns the set of registers storing the IC input operands.
|
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GeneralRegisterSet inputRegisterSet() const;
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|
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void saveIonLiveRegisters(MacroAssembler& masm, LiveRegisterSet liveRegs,
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Register scratch, IonScript* ionScript);
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void restoreIonLiveRegisters(MacroAssembler& masm, LiveRegisterSet liveRegs);
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};
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// RAII class to allocate a scratch register and release it when we're done
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// with it.
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class MOZ_RAII AutoScratchRegister
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{
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CacheRegisterAllocator& alloc_;
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Register reg_;
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|
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AutoScratchRegister(const AutoScratchRegister&) = delete;
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void operator=(const AutoScratchRegister&) = delete;
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|
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public:
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AutoScratchRegister(CacheRegisterAllocator& alloc, MacroAssembler& masm,
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Register reg = InvalidReg)
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||||
: alloc_(alloc)
|
||||
{
|
||||
if (reg != InvalidReg) {
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alloc.allocateFixedRegister(masm, reg);
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reg_ = reg;
|
||||
} else {
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reg_ = alloc.allocateRegister(masm);
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}
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MOZ_ASSERT(alloc_.currentOpRegs_.has(reg_));
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}
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~AutoScratchRegister() {
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alloc_.releaseRegister(reg_);
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}
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|
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Register get() const { return reg_; }
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operator Register() const { return reg_; }
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};
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// Like AutoScratchRegister, but lets the caller specify a register that should
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// not be allocated here.
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class MOZ_RAII AutoScratchRegisterExcluding
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{
|
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CacheRegisterAllocator& alloc_;
|
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Register reg_;
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||||
|
||||
public:
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AutoScratchRegisterExcluding(CacheRegisterAllocator& alloc, MacroAssembler& masm,
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Register excluding)
|
||||
: alloc_(alloc)
|
||||
{
|
||||
MOZ_ASSERT(excluding != InvalidReg);
|
||||
|
||||
reg_ = alloc.allocateRegister(masm);
|
||||
|
||||
if (reg_ == excluding) {
|
||||
// We need a different register, so try again.
|
||||
reg_ = alloc.allocateRegister(masm);
|
||||
MOZ_ASSERT(reg_ != excluding);
|
||||
alloc_.releaseRegister(excluding);
|
||||
}
|
||||
|
||||
MOZ_ASSERT(alloc_.currentOpRegs_.has(reg_));
|
||||
}
|
||||
~AutoScratchRegisterExcluding() {
|
||||
alloc_.releaseRegister(reg_);
|
||||
}
|
||||
operator Register() const { return reg_; }
|
||||
};
|
||||
|
||||
// The FailurePath class stores everything we need to generate a failure path
|
||||
// at the end of the IC code. The failure path restores the input registers, if
|
||||
// needed, and jumps to the next stub.
|
||||
class FailurePath
|
||||
{
|
||||
Vector<OperandLocation, 4, SystemAllocPolicy> inputs_;
|
||||
SpilledRegisterVector spilledRegs_;
|
||||
NonAssertingLabel label_;
|
||||
uint32_t stackPushed_;
|
||||
|
||||
public:
|
||||
FailurePath() = default;
|
||||
|
||||
FailurePath(FailurePath&& other)
|
||||
: inputs_(Move(other.inputs_)),
|
||||
spilledRegs_(Move(other.spilledRegs_)),
|
||||
label_(other.label_),
|
||||
stackPushed_(other.stackPushed_)
|
||||
{}
|
||||
|
||||
Label* label() { return &label_; }
|
||||
|
||||
void setStackPushed(uint32_t i) { stackPushed_ = i; }
|
||||
uint32_t stackPushed() const { return stackPushed_; }
|
||||
|
||||
[[nodiscard]] bool appendInput(const OperandLocation& loc) {
|
||||
return inputs_.append(loc);
|
||||
}
|
||||
OperandLocation input(size_t i) const {
|
||||
return inputs_[i];
|
||||
}
|
||||
|
||||
const SpilledRegisterVector& spilledRegs() const { return spilledRegs_; }
|
||||
|
||||
[[nodiscard]] bool setSpilledRegs(const SpilledRegisterVector& regs) {
|
||||
MOZ_ASSERT(spilledRegs_.empty());
|
||||
return spilledRegs_.appendAll(regs);
|
||||
}
|
||||
|
||||
// If canShareFailurePath(other) returns true, the same machine code will
|
||||
// be emitted for two failure paths, so we can share them.
|
||||
bool canShareFailurePath(const FailurePath& other) const;
|
||||
};
|
||||
|
||||
class AutoOutputRegister;
|
||||
|
||||
// Base class for BaselineCacheIRCompiler and IonCacheIRCompiler.
|
||||
class MOZ_RAII CacheIRCompiler
|
||||
{
|
||||
protected:
|
||||
friend class AutoOutputRegister;
|
||||
|
||||
enum class Mode { Baseline, Ion };
|
||||
|
||||
JSContext* cx_;
|
||||
CacheIRReader reader;
|
||||
const CacheIRWriter& writer_;
|
||||
MacroAssembler masm;
|
||||
|
||||
CacheRegisterAllocator allocator;
|
||||
Vector<FailurePath, 4, SystemAllocPolicy> failurePaths;
|
||||
|
||||
// Float registers that are live. Registers not in this set can be
|
||||
// clobbered and don't need to be saved before performing a VM call.
|
||||
// Doing this for non-float registers is a bit more complicated because
|
||||
// the IC register allocator allocates GPRs.
|
||||
LiveFloatRegisterSet liveFloatRegs_;
|
||||
|
||||
Maybe<TypedOrValueRegister> outputUnchecked_;
|
||||
Mode mode_;
|
||||
|
||||
// Whether this IC may read double values from uint32 arrays.
|
||||
Maybe<bool> allowDoubleResult_;
|
||||
|
||||
CacheIRCompiler(JSContext* cx, const CacheIRWriter& writer, Mode mode)
|
||||
: cx_(cx),
|
||||
reader(writer),
|
||||
writer_(writer),
|
||||
allocator(writer_),
|
||||
liveFloatRegs_(FloatRegisterSet::All()),
|
||||
mode_(mode)
|
||||
{
|
||||
MOZ_ASSERT(!writer.failed());
|
||||
}
|
||||
|
||||
[[nodiscard]] bool addFailurePath(FailurePath** failure);
|
||||
[[nodiscard]] bool emitFailurePath(size_t i);
|
||||
|
||||
// Returns the set of volatile float registers that are live. These
|
||||
// registers need to be saved when making non-GC calls with callWithABI.
|
||||
FloatRegisterSet liveVolatileFloatRegs() const {
|
||||
return FloatRegisterSet::Intersect(liveFloatRegs_.set(), FloatRegisterSet::Volatile());
|
||||
}
|
||||
|
||||
void emitLoadTypedObjectResultShared(const Address& fieldAddr, Register scratch,
|
||||
TypedThingLayout layout, uint32_t typeDescr,
|
||||
const AutoOutputRegister& output);
|
||||
|
||||
void emitStoreTypedObjectReferenceProp(ValueOperand val, ReferenceTypeDescr::Type type,
|
||||
const Address& dest, Register scratch);
|
||||
|
||||
private:
|
||||
void emitPostBarrierShared(Register obj, const ConstantOrRegister& val, Register scratch,
|
||||
Register maybeIndex);
|
||||
|
||||
void emitPostBarrierShared(Register obj, ValueOperand val, Register scratch,
|
||||
Register maybeIndex) {
|
||||
emitPostBarrierShared(obj, ConstantOrRegister(val), scratch, maybeIndex);
|
||||
}
|
||||
|
||||
protected:
|
||||
template <typename T>
|
||||
void emitPostBarrierSlot(Register obj, const T& val, Register scratch) {
|
||||
emitPostBarrierShared(obj, val, scratch, InvalidReg);
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
void emitPostBarrierElement(Register obj, const T& val, Register scratch, Register index) {
|
||||
MOZ_ASSERT(index != InvalidReg);
|
||||
emitPostBarrierShared(obj, val, scratch, index);
|
||||
}
|
||||
|
||||
#define DEFINE_SHARED_OP(op) [[nodiscard]] bool emit##op();
|
||||
CACHE_IR_SHARED_OPS(DEFINE_SHARED_OP)
|
||||
#undef DEFINE_SHARED_OP
|
||||
};
|
||||
|
||||
// Ensures the IC's output register is available for writing.
|
||||
class MOZ_RAII AutoOutputRegister
|
||||
{
|
||||
TypedOrValueRegister output_;
|
||||
CacheRegisterAllocator& alloc_;
|
||||
|
||||
AutoOutputRegister(const AutoOutputRegister&) = delete;
|
||||
void operator=(const AutoOutputRegister&) = delete;
|
||||
|
||||
public:
|
||||
explicit AutoOutputRegister(CacheIRCompiler& compiler);
|
||||
~AutoOutputRegister();
|
||||
|
||||
Register maybeReg() const {
|
||||
if (output_.hasValue())
|
||||
return output_.valueReg().scratchReg();
|
||||
if (!output_.typedReg().isFloat())
|
||||
return output_.typedReg().gpr();
|
||||
return InvalidReg;
|
||||
}
|
||||
|
||||
bool hasValue() const { return output_.hasValue(); }
|
||||
ValueOperand valueReg() const { return output_.valueReg(); }
|
||||
AnyRegister typedReg() const { return output_.typedReg(); }
|
||||
|
||||
JSValueType type() const {
|
||||
MOZ_ASSERT(!hasValue());
|
||||
return ValueTypeFromMIRType(output_.type());
|
||||
}
|
||||
|
||||
operator TypedOrValueRegister() const { return output_; }
|
||||
};
|
||||
|
||||
// Like AutoScratchRegister, but reuse a register of |output| if possible.
|
||||
class MOZ_RAII AutoScratchRegisterMaybeOutput
|
||||
{
|
||||
mozilla::Maybe<AutoScratchRegister> scratch_;
|
||||
Register scratchReg_;
|
||||
|
||||
AutoScratchRegisterMaybeOutput(const AutoScratchRegisterMaybeOutput&) = delete;
|
||||
void operator=(const AutoScratchRegisterMaybeOutput&) = delete;
|
||||
|
||||
public:
|
||||
AutoScratchRegisterMaybeOutput(CacheRegisterAllocator& alloc, MacroAssembler& masm,
|
||||
const AutoOutputRegister& output)
|
||||
{
|
||||
scratchReg_ = output.maybeReg();
|
||||
if (scratchReg_ == InvalidReg) {
|
||||
scratch_.emplace(alloc, masm);
|
||||
scratchReg_ = scratch_.ref();
|
||||
}
|
||||
}
|
||||
|
||||
operator Register() const { return scratchReg_; }
|
||||
};
|
||||
|
||||
// See the 'Sharing Baseline stub code' comment in CacheIR.h for a description
|
||||
// of this class.
|
||||
class CacheIRStubInfo
|
||||
{
|
||||
// These fields don't require 8 bits, but GCC complains if these fields are
|
||||
// smaller than the size of the enums.
|
||||
CacheKind kind_ : 8;
|
||||
ICStubEngine engine_ : 8;
|
||||
bool makesGCCalls_ : 1;
|
||||
uint8_t stubDataOffset_;
|
||||
|
||||
const uint8_t* code_;
|
||||
uint32_t length_;
|
||||
const uint8_t* fieldTypes_;
|
||||
|
||||
CacheIRStubInfo(CacheKind kind, ICStubEngine engine, bool makesGCCalls,
|
||||
uint32_t stubDataOffset, const uint8_t* code, uint32_t codeLength,
|
||||
const uint8_t* fieldTypes)
|
||||
: kind_(kind),
|
||||
engine_(engine),
|
||||
makesGCCalls_(makesGCCalls),
|
||||
stubDataOffset_(stubDataOffset),
|
||||
code_(code),
|
||||
length_(codeLength),
|
||||
fieldTypes_(fieldTypes)
|
||||
{
|
||||
MOZ_ASSERT(kind_ == kind, "Kind must fit in bitfield");
|
||||
MOZ_ASSERT(engine_ == engine, "Engine must fit in bitfield");
|
||||
MOZ_ASSERT(stubDataOffset_ == stubDataOffset, "stubDataOffset must fit in uint8_t");
|
||||
}
|
||||
|
||||
CacheIRStubInfo(const CacheIRStubInfo&) = delete;
|
||||
CacheIRStubInfo& operator=(const CacheIRStubInfo&) = delete;
|
||||
|
||||
public:
|
||||
CacheKind kind() const { return kind_; }
|
||||
ICStubEngine engine() const { return engine_; }
|
||||
bool makesGCCalls() const { return makesGCCalls_; }
|
||||
|
||||
const uint8_t* code() const { return code_; }
|
||||
uint32_t codeLength() const { return length_; }
|
||||
uint32_t stubDataOffset() const { return stubDataOffset_; }
|
||||
|
||||
size_t stubDataSize() const;
|
||||
|
||||
StubField::Type fieldType(uint32_t i) const { return (StubField::Type)fieldTypes_[i]; }
|
||||
|
||||
static CacheIRStubInfo* New(CacheKind kind, ICStubEngine engine, bool canMakeCalls,
|
||||
uint32_t stubDataOffset, const CacheIRWriter& writer);
|
||||
|
||||
template <class Stub, class T>
|
||||
js::GCPtr<T>& getStubField(Stub* stub, uint32_t field) const;
|
||||
|
||||
template <class T>
|
||||
js::GCPtr<T>& getStubField(ICStub* stub, uint32_t field) const {
|
||||
return getStubField<ICStub, T>(stub, field);
|
||||
}
|
||||
|
||||
void copyStubData(ICStub* src, ICStub* dest) const;
|
||||
};
|
||||
|
||||
template <typename T>
|
||||
void TraceCacheIRStub(JSTracer* trc, T* stub, const CacheIRStubInfo* stubInfo);
|
||||
|
||||
} // namespace jit
|
||||
} // namespace js
|
||||
|
||||
#endif /* jit_CacheIRCompiler_h */
|
||||
|
|
@ -7725,8 +7725,7 @@ CodeGenerator::visitCharCodeAt(LCharCodeAt* lir)
|
|||
|
||||
OutOfLineCode* ool = oolCallVM(CharCodeAtInfo, lir, ArgList(str, index), StoreRegisterTo(output));
|
||||
|
||||
masm.branchIfRope(str, ool->entry());
|
||||
masm.loadStringChar(str, index, output);
|
||||
masm.loadStringChar(str, index, output, ool->entry());
|
||||
|
||||
masm.bind(ool->rejoin());
|
||||
}
|
||||
|
|
|
|||
2185
js/src/jit/IonCacheIRCompiler.cpp
Normal file
2185
js/src/jit/IonCacheIRCompiler.cpp
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -409,6 +409,14 @@ MacroAssembler::branchIfRopeOrExternal(Register str, Register temp, Label* label
|
|||
branch32(Assembler::Equal, temp, Imm32(JSString::EXTERNAL_FLAGS), label);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssembler::branchIfNotRope(Register str, Label* label)
|
||||
{
|
||||
Address flags(str, JSString::offsetOfFlags());
|
||||
static_assert(JSString::ROPE_FLAGS == 0, "Rope type flags must be 0");
|
||||
branchTest32(Assembler::NonZero, flags, Imm32(JSString::TYPE_FLAGS_MASK), label);
|
||||
}
|
||||
|
||||
void
|
||||
MacroAssembler::branchLatin1String(Register string, Label* label)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1310,19 +1310,40 @@ MacroAssembler::loadStringChars(Register str, Register dest)
|
|||
}
|
||||
|
||||
void
|
||||
MacroAssembler::loadStringChar(Register str, Register index, Register output)
|
||||
MacroAssembler::loadStringChar(Register str, Register index, Register output, Label* fail)
|
||||
{
|
||||
MOZ_ASSERT(str != output);
|
||||
MOZ_ASSERT(index != output);
|
||||
|
||||
loadStringChars(str, output);
|
||||
movePtr(str, output);
|
||||
|
||||
// This follows JSString::getChar.
|
||||
Label notRope;
|
||||
branchIfNotRope(str, ¬Rope);
|
||||
|
||||
// Load leftChild.
|
||||
loadPtr(Address(str, JSRope::offsetOfLeft()), output);
|
||||
|
||||
// Check if the index is contained in the leftChild.
|
||||
// Todo: Handle index in the rightChild.
|
||||
branch32(Assembler::BelowOrEqual, Address(output, JSString::offsetOfLength()), index, fail);
|
||||
|
||||
// If the left side is another rope, give up.
|
||||
branchIfRope(output, fail);
|
||||
|
||||
bind(¬Rope);
|
||||
|
||||
Label isLatin1, done;
|
||||
branchLatin1String(str, &isLatin1);
|
||||
// We have to check the left/right side for ropes,
|
||||
// because a TwoByte rope might have a Latin1 child.
|
||||
branchLatin1String(output, &isLatin1);
|
||||
|
||||
loadStringChars(output, output);
|
||||
load16ZeroExtend(BaseIndex(output, index, TimesTwo), output);
|
||||
jump(&done);
|
||||
|
||||
bind(&isLatin1);
|
||||
loadStringChars(output, output);
|
||||
load8ZeroExtend(BaseIndex(output, index, TimesOne), output);
|
||||
|
||||
bind(&done);
|
||||
|
|
|
|||
|
|
@ -1096,6 +1096,8 @@ class MacroAssembler : public MacroAssemblerSpecific
|
|||
inline void branchIfRope(Register str, Label* label);
|
||||
inline void branchIfRopeOrExternal(Register str, Register temp, Label* label);
|
||||
|
||||
inline void branchIfNotRope(Register str, Label* label);
|
||||
|
||||
inline void branchLatin1String(Register string, Label* label);
|
||||
inline void branchTwoByteString(Register string, Label* label);
|
||||
|
||||
|
|
@ -1445,7 +1447,7 @@ class MacroAssembler : public MacroAssemblerSpecific
|
|||
}
|
||||
|
||||
void loadStringChars(Register str, Register dest);
|
||||
void loadStringChar(Register str, Register index, Register output);
|
||||
void loadStringChar(Register str, Register index, Register output, Label* fail);
|
||||
|
||||
void loadJSContext(Register dest) {
|
||||
movePtr(ImmPtr(GetJitContext()->runtime->getJSContext()), dest);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue