mirror of
https://repo.dactyloidae.xyz/Dactyloidae/UXP.git
synced 2026-10-09 00:37:32 +09:00
Update aom to v1.0.0
Update aom to commit id d14c5bb4f336ef1842046089849dee4a301fbbf0.
This commit is contained in:
trav90
Roy Tam
parent
bb61121b44
commit
48f6d2e034
1087 changed files with 154333 additions and 265310 deletions
28
third_party/aom/av1/common/arm/av1_txfm_neon.c
vendored
Normal file
28
third_party/aom/av1/common/arm/av1_txfm_neon.c
vendored
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@ -0,0 +1,28 @@
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/*
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*
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* Copyright (c) 2018, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include <arm_neon.h>
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#include <assert.h>
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#include "aom_ports/mem.h"
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#include "av1/common/arm/mem_neon.h"
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void av1_round_shift_array_neon(int32_t *arr, int size, int bit) {
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assert(!(size % 4));
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if (!bit) return;
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const int32x4_t dup_bits_n_32x4 = vdupq_n_s32((int32_t)(-bit));
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for (int i = 0; i < size; i += 4) {
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int32x4_t tmp_q_s32 = vld1q_s32(arr);
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tmp_q_s32 = vrshlq_s32(tmp_q_s32, dup_bits_n_32x4);
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vst1q_s32(arr, tmp_q_s32);
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arr += 4;
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}
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}
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134
third_party/aom/av1/common/arm/blend_a64_hmask_neon.c
vendored
Normal file
134
third_party/aom/av1/common/arm/blend_a64_hmask_neon.c
vendored
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@ -0,0 +1,134 @@
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/*
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*
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* Copyright (c) 2018, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include <arm_neon.h>
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#include <assert.h>
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#include "aom/aom_integer.h"
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#include "aom_dsp/blend.h"
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#include "aom_ports/mem.h"
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#include "av1/common/arm/mem_neon.h"
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#include "aom_dsp/aom_dsp_common.h"
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#include "config/aom_dsp_rtcd.h"
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void aom_blend_a64_hmask_neon(uint8_t *dst, uint32_t dst_stride,
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const uint8_t *src0, uint32_t src0_stride,
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const uint8_t *src1, uint32_t src1_stride,
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const uint8_t *mask, int w, int h) {
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assert(IMPLIES(src0 == dst, src0_stride == dst_stride));
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assert(IMPLIES(src1 == dst, src1_stride == dst_stride));
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assert(h >= 2);
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assert(w >= 2);
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assert(IS_POWER_OF_TWO(h));
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assert(IS_POWER_OF_TWO(w));
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uint8x8_t tmp0, tmp1;
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uint8x16_t res_q;
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uint16x8_t res, res_low, res_high;
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uint32x2_t tmp0_32, tmp1_32;
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uint16x4_t tmp0_16, tmp1_16;
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const uint8x8_t vdup_64 = vdup_n_u8((uint8_t)64);
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if (w >= 16) {
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const uint8x16_t vdup_64_q = vdupq_n_u8((uint8_t)64);
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for (int i = 0; i < h; ++i) {
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for (int j = 0; j < w; j += 16) {
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__builtin_prefetch(src0);
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__builtin_prefetch(src1);
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const uint8x16_t tmp0_q = vld1q_u8(src0);
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const uint8x16_t tmp1_q = vld1q_u8(src1);
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const uint8x16_t m_q = vld1q_u8(mask);
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const uint8x16_t max_minus_m_q = vsubq_u8(vdup_64_q, m_q);
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res_low = vmull_u8(vget_low_u8(m_q), vget_low_u8(tmp0_q));
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res_low =
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vmlal_u8(res_low, vget_low_u8(max_minus_m_q), vget_low_u8(tmp1_q));
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res_high = vmull_u8(vget_high_u8(m_q), vget_high_u8(tmp0_q));
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res_high = vmlal_u8(res_high, vget_high_u8(max_minus_m_q),
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vget_high_u8(tmp1_q));
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res_q = vcombine_u8(vrshrn_n_u16(res_low, AOM_BLEND_A64_ROUND_BITS),
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vrshrn_n_u16(res_high, AOM_BLEND_A64_ROUND_BITS));
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vst1q_u8(dst, res_q);
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src0 += 16;
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src1 += 16;
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dst += 16;
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mask += 16;
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}
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src0 += src0_stride - w;
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src1 += src1_stride - w;
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dst += dst_stride - w;
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mask -= w;
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}
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} else if (w == 8) {
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const uint8x8_t m = vld1_u8(mask);
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const uint8x8_t max_minus_m = vsub_u8(vdup_64, m);
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for (int i = 0; i < h; ++i) {
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__builtin_prefetch(src0);
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__builtin_prefetch(src1);
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tmp0 = vld1_u8(src0);
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tmp1 = vld1_u8(src1);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_u8(dst, vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS));
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src0 += src0_stride;
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src1 += src1_stride;
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dst += dst_stride;
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}
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} else if (w == 4) {
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const uint8x8_t m = vreinterpret_u8_u32(vld1_dup_u32((uint32_t *)mask));
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const uint8x8_t max_minus_m = vsub_u8(vdup_64, m);
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for (int i = 0; i < h; i += 2) {
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__builtin_prefetch(src0 + 0 * src0_stride);
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__builtin_prefetch(src0 + 1 * src0_stride);
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__builtin_prefetch(src1 + 0 * src1_stride);
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__builtin_prefetch(src1 + 1 * src1_stride);
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load_unaligned_u8_4x2(src0, src0_stride, &tmp0_32);
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tmp0 = vreinterpret_u8_u32(tmp0_32);
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load_unaligned_u8_4x2(src1, src1_stride, &tmp1_32);
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tmp1 = vreinterpret_u8_u32(tmp1_32);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_lane_u32(
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(uint32_t *)(dst + (0 * dst_stride)),
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vreinterpret_u32_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 0);
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vst1_lane_u32(
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(uint32_t *)(dst + (1 * dst_stride)),
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vreinterpret_u32_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 1);
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src0 += (2 * src0_stride);
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src1 += (2 * src1_stride);
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dst += (2 * dst_stride);
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}
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} else if (w == 2) {
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const uint8x8_t m = vreinterpret_u8_u16(vld1_dup_u16((uint16_t *)mask));
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const uint8x8_t max_minus_m = vsub_u8(vdup_64, m);
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for (int i = 0; i < h; i += 2) {
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__builtin_prefetch(src0 + 0 * src0_stride);
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__builtin_prefetch(src0 + 1 * src0_stride);
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__builtin_prefetch(src1 + 0 * src1_stride);
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__builtin_prefetch(src1 + 1 * src1_stride);
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load_unaligned_u8_2x2(src0, src0_stride, &tmp0_16);
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tmp0 = vreinterpret_u8_u16(tmp0_16);
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load_unaligned_u8_2x2(src1, src1_stride, &tmp1_16);
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tmp1 = vreinterpret_u8_u16(tmp1_16);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_lane_u16(
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(uint16_t *)(dst + (0 * dst_stride)),
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vreinterpret_u16_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 0);
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vst1_lane_u16(
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(uint16_t *)(dst + (1 * dst_stride)),
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vreinterpret_u16_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 1);
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src0 += (2 * src0_stride);
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src1 += (2 * src1_stride);
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dst += (2 * dst_stride);
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}
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}
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}
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141
third_party/aom/av1/common/arm/blend_a64_vmask_neon.c
vendored
Normal file
141
third_party/aom/av1/common/arm/blend_a64_vmask_neon.c
vendored
Normal file
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@ -0,0 +1,141 @@
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/*
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*
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* Copyright (c) 2018, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include <arm_neon.h>
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#include <assert.h>
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#include "aom/aom_integer.h"
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#include "aom_dsp/blend.h"
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#include "aom_ports/mem.h"
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#include "av1/common/arm/mem_neon.h"
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#include "aom_dsp/aom_dsp_common.h"
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#include "config/aom_dsp_rtcd.h"
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void aom_blend_a64_vmask_neon(uint8_t *dst, uint32_t dst_stride,
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const uint8_t *src0, uint32_t src0_stride,
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const uint8_t *src1, uint32_t src1_stride,
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const uint8_t *mask, int w, int h) {
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uint8x8_t tmp0, tmp1;
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uint8x16_t tmp0_q, tmp1_q, res_q;
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uint16x8_t res, res_low, res_high;
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uint32x2_t tmp0_32, tmp1_32;
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uint16x4_t tmp0_16, tmp1_16;
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assert(IMPLIES(src0 == dst, src0_stride == dst_stride));
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assert(IMPLIES(src1 == dst, src1_stride == dst_stride));
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assert(h >= 2);
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assert(w >= 2);
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assert(IS_POWER_OF_TWO(h));
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assert(IS_POWER_OF_TWO(w));
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if (w >= 16) {
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for (int i = 0; i < h; ++i) {
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const uint8x8_t m = vdup_n_u8((uint8_t)mask[i]);
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const uint8x8_t max_minus_m = vdup_n_u8(64 - (uint8_t)mask[i]);
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for (int j = 0; j < w; j += 16) {
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__builtin_prefetch(src0);
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__builtin_prefetch(src1);
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tmp0_q = vld1q_u8(src0);
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tmp1_q = vld1q_u8(src1);
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res_low = vmull_u8(m, vget_low_u8(tmp0_q));
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res_low = vmlal_u8(res_low, max_minus_m, vget_low_u8(tmp1_q));
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res_high = vmull_u8(m, vget_high_u8(tmp0_q));
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res_high = vmlal_u8(res_high, max_minus_m, vget_high_u8(tmp1_q));
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res_q = vcombine_u8(vrshrn_n_u16(res_low, AOM_BLEND_A64_ROUND_BITS),
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vrshrn_n_u16(res_high, AOM_BLEND_A64_ROUND_BITS));
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vst1q_u8(dst, res_q);
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src0 += 16;
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src1 += 16;
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dst += 16;
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}
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src0 += src0_stride - w;
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src1 += src1_stride - w;
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dst += dst_stride - w;
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}
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} else if (w == 8) {
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for (int i = 0; i < h; ++i) {
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__builtin_prefetch(src0);
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__builtin_prefetch(src1);
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const uint8x8_t m = vdup_n_u8((uint8_t)mask[i]);
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const uint8x8_t max_minus_m = vdup_n_u8(64 - (uint8_t)mask[i]);
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tmp0 = vld1_u8(src0);
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tmp1 = vld1_u8(src1);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_u8(dst, vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS));
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src0 += src0_stride;
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src1 += src1_stride;
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dst += dst_stride;
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}
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} else if (w == 4) {
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for (int i = 0; i < h; i += 2) {
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__builtin_prefetch(src0 + 0 * src0_stride);
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__builtin_prefetch(src0 + 1 * src0_stride);
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__builtin_prefetch(src1 + 0 * src1_stride);
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__builtin_prefetch(src1 + 1 * src1_stride);
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const uint16x4_t m1 = vdup_n_u16((uint16_t)mask[i]);
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const uint16x4_t m2 = vdup_n_u16((uint16_t)mask[i + 1]);
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const uint8x8_t m = vmovn_u16(vcombine_u16(m1, m2));
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const uint16x4_t max_minus_m1 = vdup_n_u16(64 - (uint16_t)mask[i]);
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const uint16x4_t max_minus_m2 = vdup_n_u16(64 - (uint16_t)mask[i + 1]);
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const uint8x8_t max_minus_m =
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vmovn_u16(vcombine_u16(max_minus_m1, max_minus_m2));
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load_unaligned_u8_4x2(src0, src0_stride, &tmp0_32);
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tmp0 = vreinterpret_u8_u32(tmp0_32);
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load_unaligned_u8_4x2(src1, src1_stride, &tmp1_32);
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tmp1 = vreinterpret_u8_u32(tmp1_32);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_lane_u32(
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(uint32_t *)(dst + (0 * dst_stride)),
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vreinterpret_u32_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 0);
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vst1_lane_u32(
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(uint32_t *)(dst + (1 * dst_stride)),
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vreinterpret_u32_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 1);
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src0 += (2 * src0_stride);
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src1 += (2 * src1_stride);
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dst += (2 * dst_stride);
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}
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} else if (w == 2) {
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for (int i = 0; i < h; i += 2) {
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__builtin_prefetch(src0 + 0 * src0_stride);
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__builtin_prefetch(src0 + 1 * src0_stride);
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__builtin_prefetch(src1 + 0 * src1_stride);
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__builtin_prefetch(src1 + 1 * src1_stride);
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const uint8x8_t m1 = vdup_n_u8(mask[i]);
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const uint8x8_t m2 = vdup_n_u8(mask[i + 1]);
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const uint16x4x2_t m_trn =
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vtrn_u16(vreinterpret_u16_u8(m1), vreinterpret_u16_u8(m2));
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const uint8x8_t m = vreinterpret_u8_u16(m_trn.val[0]);
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const uint8x8_t max_minus_m1 = vdup_n_u8(64 - mask[i]);
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const uint8x8_t max_minus_m2 = vdup_n_u8(64 - mask[i + 1]);
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const uint16x4x2_t max_minus_m_trn = vtrn_u16(
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vreinterpret_u16_u8(max_minus_m1), vreinterpret_u16_u8(max_minus_m2));
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const uint8x8_t max_minus_m = vreinterpret_u8_u16(max_minus_m_trn.val[0]);
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load_unaligned_u8_2x2(src0, src0_stride, &tmp0_16);
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tmp0 = vreinterpret_u8_u16(tmp0_16);
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load_unaligned_u8_2x2(src1, src1_stride, &tmp1_16);
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tmp1 = vreinterpret_u8_u16(tmp1_16);
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res = vmull_u8(m, tmp0);
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res = vmlal_u8(res, max_minus_m, tmp1);
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vst1_lane_u16(
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(uint16_t *)(dst + (0 * dst_stride)),
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vreinterpret_u16_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 0);
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vst1_lane_u16(
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(uint16_t *)(dst + (1 * dst_stride)),
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vreinterpret_u16_u8(vrshrn_n_u16(res, AOM_BLEND_A64_ROUND_BITS)), 1);
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src0 += (2 * src0_stride);
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src1 += (2 * src1_stride);
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dst += (2 * dst_stride);
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}
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}
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}
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584
third_party/aom/av1/common/arm/cfl_neon.c
vendored
Normal file
584
third_party/aom/av1/common/arm/cfl_neon.c
vendored
Normal file
|
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@ -0,0 +1,584 @@
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/*
|
||||
* Copyright (c) 2017, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
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#include <arm_neon.h>
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|
||||
#include "config/av1_rtcd.h"
|
||||
|
||||
#include "av1/common/cfl.h"
|
||||
|
||||
static INLINE void vldsubstq_s16(int16_t *dst, const uint16_t *src, int offset,
|
||||
int16x8_t sub) {
|
||||
vst1q_s16(dst + offset,
|
||||
vsubq_s16(vreinterpretq_s16_u16(vld1q_u16(src + offset)), sub));
|
||||
}
|
||||
|
||||
static INLINE uint16x8_t vldaddq_u16(const uint16_t *buf, size_t offset) {
|
||||
return vaddq_u16(vld1q_u16(buf), vld1q_u16(buf + offset));
|
||||
}
|
||||
|
||||
// Load half of a vector and duplicated in other half
|
||||
static INLINE uint8x8_t vldh_dup_u8(const uint8_t *ptr) {
|
||||
return vreinterpret_u8_u32(vld1_dup_u32((const uint32_t *)ptr));
|
||||
}
|
||||
|
||||
// Store half of a vector.
|
||||
static INLINE void vsth_u16(uint16_t *ptr, uint16x4_t val) {
|
||||
*((uint32_t *)ptr) = vreinterpret_u32_u16(val)[0];
|
||||
}
|
||||
|
||||
// Store half of a vector.
|
||||
static INLINE void vsth_u8(uint8_t *ptr, uint8x8_t val) {
|
||||
*((uint32_t *)ptr) = vreinterpret_u32_u8(val)[0];
|
||||
}
|
||||
|
||||
static void cfl_luma_subsampling_420_lbd_neon(const uint8_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + (height >> 1) * CFL_BUF_LINE;
|
||||
const int luma_stride = input_stride << 1;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x4_t top = vpaddl_u8(vldh_dup_u8(input));
|
||||
const uint16x4_t sum = vpadal_u8(top, vldh_dup_u8(input + input_stride));
|
||||
vsth_u16(pred_buf_q3, vshl_n_u16(sum, 1));
|
||||
} else if (width == 8) {
|
||||
const uint16x4_t top = vpaddl_u8(vld1_u8(input));
|
||||
const uint16x4_t sum = vpadal_u8(top, vld1_u8(input + input_stride));
|
||||
vst1_u16(pred_buf_q3, vshl_n_u16(sum, 1));
|
||||
} else if (width == 16) {
|
||||
const uint16x8_t top = vpaddlq_u8(vld1q_u8(input));
|
||||
const uint16x8_t sum = vpadalq_u8(top, vld1q_u8(input + input_stride));
|
||||
vst1q_u16(pred_buf_q3, vshlq_n_u16(sum, 1));
|
||||
} else {
|
||||
const uint8x8x4_t top = vld4_u8(input);
|
||||
const uint8x8x4_t bot = vld4_u8(input + input_stride);
|
||||
// equivalent to a vpaddlq_u8 (because vld4q interleaves)
|
||||
const uint16x8_t top_0 = vaddl_u8(top.val[0], top.val[1]);
|
||||
// equivalent to a vpaddlq_u8 (because vld4q interleaves)
|
||||
const uint16x8_t bot_0 = vaddl_u8(bot.val[0], bot.val[1]);
|
||||
// equivalent to a vpaddlq_u8 (because vld4q interleaves)
|
||||
const uint16x8_t top_1 = vaddl_u8(top.val[2], top.val[3]);
|
||||
// equivalent to a vpaddlq_u8 (because vld4q interleaves)
|
||||
const uint16x8_t bot_1 = vaddl_u8(bot.val[2], bot.val[3]);
|
||||
uint16x8x2_t sum;
|
||||
sum.val[0] = vshlq_n_u16(vaddq_u16(top_0, bot_0), 1);
|
||||
sum.val[1] = vshlq_n_u16(vaddq_u16(top_1, bot_1), 1);
|
||||
vst2q_u16(pred_buf_q3, sum);
|
||||
}
|
||||
input += luma_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
static void cfl_luma_subsampling_422_lbd_neon(const uint8_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x4_t top = vpaddl_u8(vldh_dup_u8(input));
|
||||
vsth_u16(pred_buf_q3, vshl_n_u16(top, 2));
|
||||
} else if (width == 8) {
|
||||
const uint16x4_t top = vpaddl_u8(vld1_u8(input));
|
||||
vst1_u16(pred_buf_q3, vshl_n_u16(top, 2));
|
||||
} else if (width == 16) {
|
||||
const uint16x8_t top = vpaddlq_u8(vld1q_u8(input));
|
||||
vst1q_u16(pred_buf_q3, vshlq_n_u16(top, 2));
|
||||
} else {
|
||||
const uint8x8x4_t top = vld4_u8(input);
|
||||
uint16x8x2_t sum;
|
||||
// vaddl_u8 is equivalent to a vpaddlq_u8 (because vld4q interleaves)
|
||||
sum.val[0] = vshlq_n_u16(vaddl_u8(top.val[0], top.val[1]), 2);
|
||||
sum.val[1] = vshlq_n_u16(vaddl_u8(top.val[2], top.val[3]), 2);
|
||||
vst2q_u16(pred_buf_q3, sum);
|
||||
}
|
||||
input += input_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
static void cfl_luma_subsampling_444_lbd_neon(const uint8_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x8_t top = vshll_n_u8(vldh_dup_u8(input), 3);
|
||||
vst1_u16(pred_buf_q3, vget_low_u16(top));
|
||||
} else if (width == 8) {
|
||||
const uint16x8_t top = vshll_n_u8(vld1_u8(input), 3);
|
||||
vst1q_u16(pred_buf_q3, top);
|
||||
} else {
|
||||
const uint8x16_t top = vld1q_u8(input);
|
||||
vst1q_u16(pred_buf_q3, vshll_n_u8(vget_low_u8(top), 3));
|
||||
vst1q_u16(pred_buf_q3 + 8, vshll_n_u8(vget_high_u8(top), 3));
|
||||
if (width == 32) {
|
||||
const uint8x16_t next_top = vld1q_u8(input + 16);
|
||||
vst1q_u16(pred_buf_q3 + 16, vshll_n_u8(vget_low_u8(next_top), 3));
|
||||
vst1q_u16(pred_buf_q3 + 24, vshll_n_u8(vget_high_u8(next_top), 3));
|
||||
}
|
||||
}
|
||||
input += input_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
#if __ARM_ARCH <= 7
|
||||
uint16x8_t vpaddq_u16(uint16x8_t a, uint16x8_t b) {
|
||||
return vcombine_u16(vpadd_u16(vget_low_u16(a), vget_high_u16(a)),
|
||||
vpadd_u16(vget_low_u16(b), vget_high_u16(b)));
|
||||
}
|
||||
#endif
|
||||
|
||||
static void cfl_luma_subsampling_420_hbd_neon(const uint16_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + (height >> 1) * CFL_BUF_LINE;
|
||||
const int luma_stride = input_stride << 1;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x4_t top = vld1_u16(input);
|
||||
const uint16x4_t bot = vld1_u16(input + input_stride);
|
||||
const uint16x4_t sum = vadd_u16(top, bot);
|
||||
const uint16x4_t hsum = vpadd_u16(sum, sum);
|
||||
vsth_u16(pred_buf_q3, vshl_n_u16(hsum, 1));
|
||||
} else if (width < 32) {
|
||||
const uint16x8_t top = vld1q_u16(input);
|
||||
const uint16x8_t bot = vld1q_u16(input + input_stride);
|
||||
const uint16x8_t sum = vaddq_u16(top, bot);
|
||||
if (width == 8) {
|
||||
const uint16x4_t hsum = vget_low_u16(vpaddq_u16(sum, sum));
|
||||
vst1_u16(pred_buf_q3, vshl_n_u16(hsum, 1));
|
||||
} else {
|
||||
const uint16x8_t top_1 = vld1q_u16(input + 8);
|
||||
const uint16x8_t bot_1 = vld1q_u16(input + 8 + input_stride);
|
||||
const uint16x8_t sum_1 = vaddq_u16(top_1, bot_1);
|
||||
const uint16x8_t hsum = vpaddq_u16(sum, sum_1);
|
||||
vst1q_u16(pred_buf_q3, vshlq_n_u16(hsum, 1));
|
||||
}
|
||||
} else {
|
||||
const uint16x8x4_t top = vld4q_u16(input);
|
||||
const uint16x8x4_t bot = vld4q_u16(input + input_stride);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t top_0 = vaddq_u16(top.val[0], top.val[1]);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t bot_0 = vaddq_u16(bot.val[0], bot.val[1]);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t top_1 = vaddq_u16(top.val[2], top.val[3]);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t bot_1 = vaddq_u16(bot.val[2], bot.val[3]);
|
||||
uint16x8x2_t sum;
|
||||
sum.val[0] = vshlq_n_u16(vaddq_u16(top_0, bot_0), 1);
|
||||
sum.val[1] = vshlq_n_u16(vaddq_u16(top_1, bot_1), 1);
|
||||
vst2q_u16(pred_buf_q3, sum);
|
||||
}
|
||||
input += luma_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
static void cfl_luma_subsampling_422_hbd_neon(const uint16_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x4_t top = vld1_u16(input);
|
||||
const uint16x4_t hsum = vpadd_u16(top, top);
|
||||
vsth_u16(pred_buf_q3, vshl_n_u16(hsum, 2));
|
||||
} else if (width == 8) {
|
||||
const uint16x4x2_t top = vld2_u16(input);
|
||||
// equivalent to a vpadd_u16 (because vld2 interleaves)
|
||||
const uint16x4_t hsum = vadd_u16(top.val[0], top.val[1]);
|
||||
vst1_u16(pred_buf_q3, vshl_n_u16(hsum, 2));
|
||||
} else if (width == 16) {
|
||||
const uint16x8x2_t top = vld2q_u16(input);
|
||||
// equivalent to a vpaddq_u16 (because vld2q interleaves)
|
||||
const uint16x8_t hsum = vaddq_u16(top.val[0], top.val[1]);
|
||||
vst1q_u16(pred_buf_q3, vshlq_n_u16(hsum, 2));
|
||||
} else {
|
||||
const uint16x8x4_t top = vld4q_u16(input);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t hsum_0 = vaddq_u16(top.val[0], top.val[1]);
|
||||
// equivalent to a vpaddq_u16 (because vld4q interleaves)
|
||||
const uint16x8_t hsum_1 = vaddq_u16(top.val[2], top.val[3]);
|
||||
uint16x8x2_t result = { { vshlq_n_u16(hsum_0, 2),
|
||||
vshlq_n_u16(hsum_1, 2) } };
|
||||
vst2q_u16(pred_buf_q3, result);
|
||||
}
|
||||
input += input_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
static void cfl_luma_subsampling_444_hbd_neon(const uint16_t *input,
|
||||
int input_stride,
|
||||
uint16_t *pred_buf_q3, int width,
|
||||
int height) {
|
||||
const uint16_t *end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
do {
|
||||
if (width == 4) {
|
||||
const uint16x4_t top = vld1_u16(input);
|
||||
vst1_u16(pred_buf_q3, vshl_n_u16(top, 3));
|
||||
} else if (width == 8) {
|
||||
const uint16x8_t top = vld1q_u16(input);
|
||||
vst1q_u16(pred_buf_q3, vshlq_n_u16(top, 3));
|
||||
} else if (width == 16) {
|
||||
uint16x8x2_t top = vld2q_u16(input);
|
||||
top.val[0] = vshlq_n_u16(top.val[0], 3);
|
||||
top.val[1] = vshlq_n_u16(top.val[1], 3);
|
||||
vst2q_u16(pred_buf_q3, top);
|
||||
} else {
|
||||
uint16x8x4_t top = vld4q_u16(input);
|
||||
top.val[0] = vshlq_n_u16(top.val[0], 3);
|
||||
top.val[1] = vshlq_n_u16(top.val[1], 3);
|
||||
top.val[2] = vshlq_n_u16(top.val[2], 3);
|
||||
top.val[3] = vshlq_n_u16(top.val[3], 3);
|
||||
vst4q_u16(pred_buf_q3, top);
|
||||
}
|
||||
input += input_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
|
||||
CFL_GET_SUBSAMPLE_FUNCTION(neon)
|
||||
|
||||
static INLINE void subtract_average_neon(const uint16_t *src, int16_t *dst,
|
||||
int width, int height,
|
||||
int round_offset,
|
||||
const int num_pel_log2) {
|
||||
const uint16_t *const end = src + height * CFL_BUF_LINE;
|
||||
|
||||
// Round offset is not needed, because NEON will handle the rounding.
|
||||
(void)round_offset;
|
||||
|
||||
// To optimize the use of the CPU pipeline, we process 4 rows per iteration
|
||||
const int step = 4 * CFL_BUF_LINE;
|
||||
|
||||
// At this stage, the prediction buffer contains scaled reconstructed luma
|
||||
// pixels, which are positive integer and only require 15 bits. By using
|
||||
// unsigned integer for the sum, we can do one addition operation inside 16
|
||||
// bits (8 lanes) before having to convert to 32 bits (4 lanes).
|
||||
const uint16_t *sum_buf = src;
|
||||
uint32x4_t sum_32x4 = { 0, 0, 0, 0 };
|
||||
do {
|
||||
// For all widths, we load, add and combine the data so it fits in 4 lanes.
|
||||
if (width == 4) {
|
||||
const uint16x4_t a0 =
|
||||
vadd_u16(vld1_u16(sum_buf), vld1_u16(sum_buf + CFL_BUF_LINE));
|
||||
const uint16x4_t a1 = vadd_u16(vld1_u16(sum_buf + 2 * CFL_BUF_LINE),
|
||||
vld1_u16(sum_buf + 3 * CFL_BUF_LINE));
|
||||
sum_32x4 = vaddq_u32(sum_32x4, vaddl_u16(a0, a1));
|
||||
} else if (width == 8) {
|
||||
const uint16x8_t a0 = vldaddq_u16(sum_buf, CFL_BUF_LINE);
|
||||
const uint16x8_t a1 =
|
||||
vldaddq_u16(sum_buf + 2 * CFL_BUF_LINE, CFL_BUF_LINE);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, a0);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, a1);
|
||||
} else {
|
||||
const uint16x8_t row0 = vldaddq_u16(sum_buf, 8);
|
||||
const uint16x8_t row1 = vldaddq_u16(sum_buf + CFL_BUF_LINE, 8);
|
||||
const uint16x8_t row2 = vldaddq_u16(sum_buf + 2 * CFL_BUF_LINE, 8);
|
||||
const uint16x8_t row3 = vldaddq_u16(sum_buf + 3 * CFL_BUF_LINE, 8);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row0);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row1);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row2);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row3);
|
||||
|
||||
if (width == 32) {
|
||||
const uint16x8_t row0_1 = vldaddq_u16(sum_buf + 16, 8);
|
||||
const uint16x8_t row1_1 = vldaddq_u16(sum_buf + CFL_BUF_LINE + 16, 8);
|
||||
const uint16x8_t row2_1 =
|
||||
vldaddq_u16(sum_buf + 2 * CFL_BUF_LINE + 16, 8);
|
||||
const uint16x8_t row3_1 =
|
||||
vldaddq_u16(sum_buf + 3 * CFL_BUF_LINE + 16, 8);
|
||||
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row0_1);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row1_1);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row2_1);
|
||||
sum_32x4 = vpadalq_u16(sum_32x4, row3_1);
|
||||
}
|
||||
}
|
||||
sum_buf += step;
|
||||
} while (sum_buf < end);
|
||||
|
||||
// Permute and add in such a way that each lane contains the block sum.
|
||||
// [A+C+B+D, B+D+A+C, C+A+D+B, D+B+C+A]
|
||||
#if __ARM_ARCH >= 8
|
||||
sum_32x4 = vpaddq_u32(sum_32x4, sum_32x4);
|
||||
sum_32x4 = vpaddq_u32(sum_32x4, sum_32x4);
|
||||
#else
|
||||
uint32x4_t flip =
|
||||
vcombine_u32(vget_high_u32(sum_32x4), vget_low_u32(sum_32x4));
|
||||
sum_32x4 = vaddq_u32(sum_32x4, flip);
|
||||
sum_32x4 = vaddq_u32(sum_32x4, vrev64q_u32(sum_32x4));
|
||||
#endif
|
||||
|
||||
// Computing the average could be done using scalars, but getting off the NEON
|
||||
// engine introduces latency, so we use vqrshrn.
|
||||
int16x4_t avg_16x4;
|
||||
// Constant propagation makes for some ugly code.
|
||||
switch (num_pel_log2) {
|
||||
case 4: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 4)); break;
|
||||
case 5: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 5)); break;
|
||||
case 6: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 6)); break;
|
||||
case 7: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 7)); break;
|
||||
case 8: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 8)); break;
|
||||
case 9: avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 9)); break;
|
||||
case 10:
|
||||
avg_16x4 = vreinterpret_s16_u16(vqrshrn_n_u32(sum_32x4, 10));
|
||||
break;
|
||||
default: assert(0);
|
||||
}
|
||||
|
||||
if (width == 4) {
|
||||
do {
|
||||
vst1_s16(dst, vsub_s16(vreinterpret_s16_u16(vld1_u16(src)), avg_16x4));
|
||||
src += CFL_BUF_LINE;
|
||||
dst += CFL_BUF_LINE;
|
||||
} while (src < end);
|
||||
} else {
|
||||
const int16x8_t avg_16x8 = vcombine_s16(avg_16x4, avg_16x4);
|
||||
do {
|
||||
vldsubstq_s16(dst, src, 0, avg_16x8);
|
||||
vldsubstq_s16(dst, src, CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 2 * CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 3 * CFL_BUF_LINE, avg_16x8);
|
||||
|
||||
if (width > 8) {
|
||||
vldsubstq_s16(dst, src, 8, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 8 + CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 8 + 2 * CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 8 + 3 * CFL_BUF_LINE, avg_16x8);
|
||||
}
|
||||
if (width == 32) {
|
||||
vldsubstq_s16(dst, src, 16, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 16 + CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 16 + 2 * CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 16 + 3 * CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 24, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 24 + CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 24 + 2 * CFL_BUF_LINE, avg_16x8);
|
||||
vldsubstq_s16(dst, src, 24 + 3 * CFL_BUF_LINE, avg_16x8);
|
||||
}
|
||||
src += step;
|
||||
dst += step;
|
||||
} while (src < end);
|
||||
}
|
||||
}
|
||||
|
||||
CFL_SUB_AVG_FN(neon)
|
||||
|
||||
// Saturating negate 16-bit integers in a when the corresponding signed 16-bit
|
||||
// integer in b is negative.
|
||||
// Notes:
|
||||
// * Negating INT16_MIN results in INT16_MIN. However, this cannot occur in
|
||||
// practice, as scaled_luma is the multiplication of two absolute values.
|
||||
// * In the Intel equivalent, elements in a are zeroed out when the
|
||||
// corresponding elements in b are zero. Because vsign is used twice in a
|
||||
// row, with b in the first call becoming a in the second call, there's no
|
||||
// impact from not zeroing out.
|
||||
static int16x4_t vsign_s16(int16x4_t a, int16x4_t b) {
|
||||
const int16x4_t mask = vshr_n_s16(b, 15);
|
||||
return veor_s16(vadd_s16(a, mask), mask);
|
||||
}
|
||||
|
||||
// Saturating negate 16-bit integers in a when the corresponding signed 16-bit
|
||||
// integer in b is negative.
|
||||
// Notes:
|
||||
// * Negating INT16_MIN results in INT16_MIN. However, this cannot occur in
|
||||
// practice, as scaled_luma is the multiplication of two absolute values.
|
||||
// * In the Intel equivalent, elements in a are zeroed out when the
|
||||
// corresponding elements in b are zero. Because vsignq is used twice in a
|
||||
// row, with b in the first call becoming a in the second call, there's no
|
||||
// impact from not zeroing out.
|
||||
static int16x8_t vsignq_s16(int16x8_t a, int16x8_t b) {
|
||||
const int16x8_t mask = vshrq_n_s16(b, 15);
|
||||
return veorq_s16(vaddq_s16(a, mask), mask);
|
||||
}
|
||||
|
||||
static INLINE int16x4_t predict_w4(const int16_t *pred_buf_q3,
|
||||
int16x4_t alpha_sign, int abs_alpha_q12,
|
||||
int16x4_t dc) {
|
||||
const int16x4_t ac_q3 = vld1_s16(pred_buf_q3);
|
||||
const int16x4_t ac_sign = veor_s16(alpha_sign, ac_q3);
|
||||
int16x4_t scaled_luma = vqrdmulh_n_s16(vabs_s16(ac_q3), abs_alpha_q12);
|
||||
return vadd_s16(vsign_s16(scaled_luma, ac_sign), dc);
|
||||
}
|
||||
|
||||
static INLINE int16x8_t predict_w8(const int16_t *pred_buf_q3,
|
||||
int16x8_t alpha_sign, int abs_alpha_q12,
|
||||
int16x8_t dc) {
|
||||
const int16x8_t ac_q3 = vld1q_s16(pred_buf_q3);
|
||||
const int16x8_t ac_sign = veorq_s16(alpha_sign, ac_q3);
|
||||
int16x8_t scaled_luma = vqrdmulhq_n_s16(vabsq_s16(ac_q3), abs_alpha_q12);
|
||||
return vaddq_s16(vsignq_s16(scaled_luma, ac_sign), dc);
|
||||
}
|
||||
|
||||
static INLINE int16x8x2_t predict_w16(const int16_t *pred_buf_q3,
|
||||
int16x8_t alpha_sign, int abs_alpha_q12,
|
||||
int16x8_t dc) {
|
||||
// vld2q_s16 interleaves, which is not useful for prediction. vst1q_s16_x2
|
||||
// does not interleave, but is not currently available in the compilier used
|
||||
// by the AOM build system.
|
||||
const int16x8x2_t ac_q3 = vld2q_s16(pred_buf_q3);
|
||||
const int16x8_t ac_sign_0 = veorq_s16(alpha_sign, ac_q3.val[0]);
|
||||
const int16x8_t ac_sign_1 = veorq_s16(alpha_sign, ac_q3.val[1]);
|
||||
const int16x8_t scaled_luma_0 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[0]), abs_alpha_q12);
|
||||
const int16x8_t scaled_luma_1 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[1]), abs_alpha_q12);
|
||||
int16x8x2_t result;
|
||||
result.val[0] = vaddq_s16(vsignq_s16(scaled_luma_0, ac_sign_0), dc);
|
||||
result.val[1] = vaddq_s16(vsignq_s16(scaled_luma_1, ac_sign_1), dc);
|
||||
return result;
|
||||
}
|
||||
|
||||
static INLINE int16x8x4_t predict_w32(const int16_t *pred_buf_q3,
|
||||
int16x8_t alpha_sign, int abs_alpha_q12,
|
||||
int16x8_t dc) {
|
||||
// vld4q_s16 interleaves, which is not useful for prediction. vst1q_s16_x4
|
||||
// does not interleave, but is not currently available in the compilier used
|
||||
// by the AOM build system.
|
||||
const int16x8x4_t ac_q3 = vld4q_s16(pred_buf_q3);
|
||||
const int16x8_t ac_sign_0 = veorq_s16(alpha_sign, ac_q3.val[0]);
|
||||
const int16x8_t ac_sign_1 = veorq_s16(alpha_sign, ac_q3.val[1]);
|
||||
const int16x8_t ac_sign_2 = veorq_s16(alpha_sign, ac_q3.val[2]);
|
||||
const int16x8_t ac_sign_3 = veorq_s16(alpha_sign, ac_q3.val[3]);
|
||||
const int16x8_t scaled_luma_0 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[0]), abs_alpha_q12);
|
||||
const int16x8_t scaled_luma_1 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[1]), abs_alpha_q12);
|
||||
const int16x8_t scaled_luma_2 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[2]), abs_alpha_q12);
|
||||
const int16x8_t scaled_luma_3 =
|
||||
vqrdmulhq_n_s16(vabsq_s16(ac_q3.val[3]), abs_alpha_q12);
|
||||
int16x8x4_t result;
|
||||
result.val[0] = vaddq_s16(vsignq_s16(scaled_luma_0, ac_sign_0), dc);
|
||||
result.val[1] = vaddq_s16(vsignq_s16(scaled_luma_1, ac_sign_1), dc);
|
||||
result.val[2] = vaddq_s16(vsignq_s16(scaled_luma_2, ac_sign_2), dc);
|
||||
result.val[3] = vaddq_s16(vsignq_s16(scaled_luma_3, ac_sign_3), dc);
|
||||
return result;
|
||||
}
|
||||
|
||||
static INLINE void cfl_predict_lbd_neon(const int16_t *pred_buf_q3,
|
||||
uint8_t *dst, int dst_stride,
|
||||
int alpha_q3, int width, int height) {
|
||||
const int16_t abs_alpha_q12 = abs(alpha_q3) << 9;
|
||||
const int16_t *const end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
if (width == 4) {
|
||||
const int16x4_t alpha_sign = vdup_n_s16(alpha_q3);
|
||||
const int16x4_t dc = vdup_n_s16(*dst);
|
||||
do {
|
||||
const int16x4_t pred =
|
||||
predict_w4(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
vsth_u8(dst, vqmovun_s16(vcombine_s16(pred, pred)));
|
||||
dst += dst_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
} else {
|
||||
const int16x8_t alpha_sign = vdupq_n_s16(alpha_q3);
|
||||
const int16x8_t dc = vdupq_n_s16(*dst);
|
||||
do {
|
||||
if (width == 8) {
|
||||
vst1_u8(dst, vqmovun_s16(predict_w8(pred_buf_q3, alpha_sign,
|
||||
abs_alpha_q12, dc)));
|
||||
} else if (width == 16) {
|
||||
const int16x8x2_t pred =
|
||||
predict_w16(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
const uint8x8x2_t predun = { { vqmovun_s16(pred.val[0]),
|
||||
vqmovun_s16(pred.val[1]) } };
|
||||
vst2_u8(dst, predun);
|
||||
} else {
|
||||
const int16x8x4_t pred =
|
||||
predict_w32(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
const uint8x8x4_t predun = {
|
||||
{ vqmovun_s16(pred.val[0]), vqmovun_s16(pred.val[1]),
|
||||
vqmovun_s16(pred.val[2]), vqmovun_s16(pred.val[3]) }
|
||||
};
|
||||
vst4_u8(dst, predun);
|
||||
}
|
||||
dst += dst_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
}
|
||||
|
||||
CFL_PREDICT_FN(neon, lbd)
|
||||
|
||||
static INLINE uint16x4_t clamp_s16(int16x4_t a, int16x4_t max) {
|
||||
return vreinterpret_u16_s16(vmax_s16(vmin_s16(a, max), vdup_n_s16(0)));
|
||||
}
|
||||
|
||||
static INLINE uint16x8_t clampq_s16(int16x8_t a, int16x8_t max) {
|
||||
return vreinterpretq_u16_s16(vmaxq_s16(vminq_s16(a, max), vdupq_n_s16(0)));
|
||||
}
|
||||
|
||||
static INLINE uint16x8x2_t clamp2q_s16(int16x8x2_t a, int16x8_t max) {
|
||||
uint16x8x2_t result;
|
||||
result.val[0] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[0], max), vdupq_n_s16(0)));
|
||||
result.val[1] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[1], max), vdupq_n_s16(0)));
|
||||
return result;
|
||||
}
|
||||
|
||||
static INLINE uint16x8x4_t clamp4q_s16(int16x8x4_t a, int16x8_t max) {
|
||||
uint16x8x4_t result;
|
||||
result.val[0] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[0], max), vdupq_n_s16(0)));
|
||||
result.val[1] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[1], max), vdupq_n_s16(0)));
|
||||
result.val[2] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[2], max), vdupq_n_s16(0)));
|
||||
result.val[3] = vreinterpretq_u16_s16(
|
||||
vmaxq_s16(vminq_s16(a.val[3], max), vdupq_n_s16(0)));
|
||||
return result;
|
||||
}
|
||||
|
||||
static INLINE void cfl_predict_hbd_neon(const int16_t *pred_buf_q3,
|
||||
uint16_t *dst, int dst_stride,
|
||||
int alpha_q3, int bd, int width,
|
||||
int height) {
|
||||
const int max = (1 << bd) - 1;
|
||||
const int16_t abs_alpha_q12 = abs(alpha_q3) << 9;
|
||||
const int16_t *const end = pred_buf_q3 + height * CFL_BUF_LINE;
|
||||
if (width == 4) {
|
||||
const int16x4_t alpha_sign = vdup_n_s16(alpha_q3);
|
||||
const int16x4_t dc = vdup_n_s16(*dst);
|
||||
const int16x4_t max_16x4 = vdup_n_s16(max);
|
||||
do {
|
||||
const int16x4_t scaled_luma =
|
||||
predict_w4(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
vst1_u16(dst, clamp_s16(scaled_luma, max_16x4));
|
||||
dst += dst_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
} else {
|
||||
const int16x8_t alpha_sign = vdupq_n_s16(alpha_q3);
|
||||
const int16x8_t dc = vdupq_n_s16(*dst);
|
||||
const int16x8_t max_16x8 = vdupq_n_s16(max);
|
||||
do {
|
||||
if (width == 8) {
|
||||
const int16x8_t pred =
|
||||
predict_w8(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
vst1q_u16(dst, clampq_s16(pred, max_16x8));
|
||||
} else if (width == 16) {
|
||||
const int16x8x2_t pred =
|
||||
predict_w16(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
vst2q_u16(dst, clamp2q_s16(pred, max_16x8));
|
||||
} else {
|
||||
const int16x8x4_t pred =
|
||||
predict_w32(pred_buf_q3, alpha_sign, abs_alpha_q12, dc);
|
||||
vst4q_u16(dst, clamp4q_s16(pred, max_16x8));
|
||||
}
|
||||
dst += dst_stride;
|
||||
} while ((pred_buf_q3 += CFL_BUF_LINE) < end);
|
||||
}
|
||||
}
|
||||
|
||||
CFL_PREDICT_FN(neon, hbd)
|
||||
1134
third_party/aom/av1/common/arm/convolve_neon.c
vendored
Normal file
1134
third_party/aom/av1/common/arm/convolve_neon.c
vendored
Normal file
File diff suppressed because it is too large
Load diff
228
third_party/aom/av1/common/arm/convolve_neon.h
vendored
Normal file
228
third_party/aom/av1/common/arm/convolve_neon.h
vendored
Normal file
|
|
@ -0,0 +1,228 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All Rights Reserved.
|
||||
*
|
||||
* Use of this source code is governed by a BSD-style license
|
||||
* that can be found in the LICENSE file in the root of the source
|
||||
* tree. An additional intellectual property rights grant can be found
|
||||
* in the file PATENTS. All contributing project authors may
|
||||
* be found in the AUTHORS file in the root of the source tree.
|
||||
*/
|
||||
|
||||
#ifndef AV1_COMMON_ARM_CONVOLVE_NEON_H_
|
||||
#define AV1_COMMON_ARM_CONVOLVE_NEON_H_
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
#define HORIZ_EXTRA_ROWS ((SUBPEL_TAPS + 7) & ~0x07)
|
||||
|
||||
static INLINE uint8x8_t wiener_convolve8_vert_4x8(
|
||||
const int16x8_t s0, const int16x8_t s1, const int16x8_t s2,
|
||||
const int16x8_t s3, const int16x8_t s4, const int16x8_t s5,
|
||||
const int16x8_t s6, int16_t *filter_y, const int bd,
|
||||
const int round1_bits) {
|
||||
int16x8_t ss0, ss1, ss2;
|
||||
int32x4_t sum0, sum1;
|
||||
uint16x4_t tmp0, tmp1;
|
||||
uint16x8_t tmp;
|
||||
uint8x8_t res;
|
||||
|
||||
const int32_t round_const = (1 << (bd + round1_bits - 1));
|
||||
const int32x4_t round_bits = vdupq_n_s32(-round1_bits);
|
||||
const int32x4_t zero = vdupq_n_s32(0);
|
||||
const int32x4_t round_vec = vdupq_n_s32(round_const);
|
||||
|
||||
ss0 = vaddq_s16(s0, s6);
|
||||
ss1 = vaddq_s16(s1, s5);
|
||||
ss2 = vaddq_s16(s2, s4);
|
||||
|
||||
sum0 = vmull_n_s16(vget_low_s16(ss0), filter_y[0]);
|
||||
sum0 = vmlal_n_s16(sum0, vget_low_s16(ss1), filter_y[1]);
|
||||
sum0 = vmlal_n_s16(sum0, vget_low_s16(ss2), filter_y[2]);
|
||||
sum0 = vmlal_n_s16(sum0, vget_low_s16(s3), filter_y[3]);
|
||||
|
||||
sum1 = vmull_n_s16(vget_high_s16(ss0), filter_y[0]);
|
||||
sum1 = vmlal_n_s16(sum1, vget_high_s16(ss1), filter_y[1]);
|
||||
sum1 = vmlal_n_s16(sum1, vget_high_s16(ss2), filter_y[2]);
|
||||
sum1 = vmlal_n_s16(sum1, vget_high_s16(s3), filter_y[3]);
|
||||
|
||||
sum0 = vsubq_s32(sum0, round_vec);
|
||||
sum1 = vsubq_s32(sum1, round_vec);
|
||||
|
||||
/* right shift & rounding */
|
||||
sum0 = vrshlq_s32(sum0, round_bits);
|
||||
sum1 = vrshlq_s32(sum1, round_bits);
|
||||
|
||||
sum0 = vmaxq_s32(sum0, zero);
|
||||
sum1 = vmaxq_s32(sum1, zero);
|
||||
|
||||
/* from int32x4_t to uint8x8_t */
|
||||
tmp0 = vqmovn_u32(vreinterpretq_u32_s32(sum0));
|
||||
tmp1 = vqmovn_u32(vreinterpretq_u32_s32(sum1));
|
||||
tmp = vcombine_u16(tmp0, tmp1);
|
||||
res = vqmovn_u16(tmp);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static INLINE uint16x8_t wiener_convolve8_horiz_8x8(
|
||||
const int16x8_t s0, const int16x8_t s1, const int16x8_t s2,
|
||||
const int16x8_t s3, int16_t *filter_x, const int bd,
|
||||
const int round0_bits) {
|
||||
int16x8_t sum;
|
||||
uint16x8_t res;
|
||||
int32x4_t sum_0, sum_1;
|
||||
int32x4_t s3_0, s3_1;
|
||||
const int32_t round_const_0 = (1 << (bd + FILTER_BITS - 1));
|
||||
const int32_t round_const_1 = (1 << ((bd) + 1 + FILTER_BITS - round0_bits));
|
||||
|
||||
/* for the purpose of right shift by { conv_params->round_0 } */
|
||||
const int32x4_t round_bits = vdupq_n_s32(-round0_bits);
|
||||
|
||||
const int32x4_t round_vec_0 = vdupq_n_s32(round_const_0);
|
||||
const int32x4_t round_vec_1 = vdupq_n_s32(round_const_1);
|
||||
|
||||
sum = vmulq_n_s16(s0, filter_x[0]);
|
||||
sum = vmlaq_n_s16(sum, s1, filter_x[1]);
|
||||
sum = vmlaq_n_s16(sum, s2, filter_x[2]);
|
||||
|
||||
/* sum from 16x8 to 2 32x4 registers */
|
||||
sum_0 = vmovl_s16(vget_low_s16(sum));
|
||||
sum_1 = vmovl_s16(vget_high_s16(sum));
|
||||
|
||||
/* s[3]*128 -- and filter coef max can be 128
|
||||
* then max value possible = 128*128*255 exceeding 16 bit
|
||||
*/
|
||||
|
||||
s3_0 = vmull_n_s16(vget_low_s16(s3), filter_x[3]);
|
||||
s3_1 = vmull_n_s16(vget_high_s16(s3), filter_x[3]);
|
||||
sum_0 = vaddq_s32(sum_0, s3_0);
|
||||
sum_1 = vaddq_s32(sum_1, s3_1);
|
||||
|
||||
/* Add the constant value */
|
||||
sum_0 = vaddq_s32(sum_0, round_vec_0);
|
||||
sum_1 = vaddq_s32(sum_1, round_vec_0);
|
||||
|
||||
/* right shift & rounding & saturating */
|
||||
sum_0 = vqrshlq_s32(sum_0, round_bits);
|
||||
sum_1 = vqrshlq_s32(sum_1, round_bits);
|
||||
|
||||
/* Clipping to max value */
|
||||
sum_0 = vminq_s32(sum_0, round_vec_1);
|
||||
sum_1 = vminq_s32(sum_1, round_vec_1);
|
||||
|
||||
res = vcombine_u16(vqmovun_s32(sum_0), vqmovun_s32(sum_1));
|
||||
return res;
|
||||
}
|
||||
|
||||
static INLINE uint16x4_t wiener_convolve8_horiz_4x8(
|
||||
const int16x4_t s0, const int16x4_t s1, const int16x4_t s2,
|
||||
const int16x4_t s3, const int16x4_t s4, const int16x4_t s5,
|
||||
const int16x4_t s6, int16_t *filter_x, const int bd,
|
||||
const int round0_bits) {
|
||||
uint16x4_t res;
|
||||
int32x4_t sum_0, s3_0;
|
||||
int16x4_t sum, temp0, temp1, temp2;
|
||||
|
||||
const int32_t round_const_0 = (1 << (bd + FILTER_BITS - 1));
|
||||
const int32_t round_const_1 = (1 << ((bd) + 1 + FILTER_BITS - round0_bits));
|
||||
const int32x4_t round_bits = vdupq_n_s32(-round0_bits);
|
||||
const int32x4_t zero = vdupq_n_s32(0);
|
||||
const int32x4_t round_vec_0 = vdupq_n_s32(round_const_0);
|
||||
const int32x4_t round_vec_1 = vdupq_n_s32(round_const_1);
|
||||
|
||||
temp0 = vadd_s16(s0, s6);
|
||||
temp1 = vadd_s16(s1, s5);
|
||||
temp2 = vadd_s16(s2, s4);
|
||||
|
||||
sum = vmul_n_s16(temp0, filter_x[0]);
|
||||
sum = vmla_n_s16(sum, temp1, filter_x[1]);
|
||||
sum = vmla_n_s16(sum, temp2, filter_x[2]);
|
||||
sum_0 = vmovl_s16(sum);
|
||||
|
||||
/* s[3]*128 -- and filter coff max can be 128.
|
||||
* then max value possible = 128*128*255 Therefore, 32 bits are required to
|
||||
* hold the result.
|
||||
*/
|
||||
s3_0 = vmull_n_s16(s3, filter_x[3]);
|
||||
sum_0 = vaddq_s32(sum_0, s3_0);
|
||||
|
||||
sum_0 = vaddq_s32(sum_0, round_vec_0);
|
||||
sum_0 = vrshlq_s32(sum_0, round_bits);
|
||||
|
||||
sum_0 = vmaxq_s32(sum_0, zero);
|
||||
sum_0 = vminq_s32(sum_0, round_vec_1);
|
||||
res = vqmovun_s32(sum_0);
|
||||
return res;
|
||||
}
|
||||
|
||||
static INLINE int16x8_t
|
||||
convolve8_8x8_s16(const int16x8_t s0, const int16x8_t s1, const int16x8_t s2,
|
||||
const int16x8_t s3, const int16x8_t s4, const int16x8_t s5,
|
||||
const int16x8_t s6, const int16x8_t s7, const int16_t *filter,
|
||||
const int16x8_t horiz_const, const int16x8_t shift_round_0) {
|
||||
int16x8_t sum;
|
||||
int16x8_t res;
|
||||
|
||||
sum = horiz_const;
|
||||
sum = vmlaq_n_s16(sum, s0, filter[0]);
|
||||
sum = vmlaq_n_s16(sum, s1, filter[1]);
|
||||
sum = vmlaq_n_s16(sum, s2, filter[2]);
|
||||
sum = vmlaq_n_s16(sum, s3, filter[3]);
|
||||
sum = vmlaq_n_s16(sum, s4, filter[4]);
|
||||
sum = vmlaq_n_s16(sum, s5, filter[5]);
|
||||
sum = vmlaq_n_s16(sum, s6, filter[6]);
|
||||
sum = vmlaq_n_s16(sum, s7, filter[7]);
|
||||
|
||||
res = vqrshlq_s16(sum, shift_round_0);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
static INLINE int16x4_t
|
||||
convolve8_4x4_s16(const int16x4_t s0, const int16x4_t s1, const int16x4_t s2,
|
||||
const int16x4_t s3, const int16x4_t s4, const int16x4_t s5,
|
||||
const int16x4_t s6, const int16x4_t s7, const int16_t *filter,
|
||||
const int16x4_t horiz_const, const int16x4_t shift_round_0) {
|
||||
int16x4_t sum;
|
||||
sum = horiz_const;
|
||||
sum = vmla_n_s16(sum, s0, filter[0]);
|
||||
sum = vmla_n_s16(sum, s1, filter[1]);
|
||||
sum = vmla_n_s16(sum, s2, filter[2]);
|
||||
sum = vmla_n_s16(sum, s3, filter[3]);
|
||||
sum = vmla_n_s16(sum, s4, filter[4]);
|
||||
sum = vmla_n_s16(sum, s5, filter[5]);
|
||||
sum = vmla_n_s16(sum, s6, filter[6]);
|
||||
sum = vmla_n_s16(sum, s7, filter[7]);
|
||||
|
||||
sum = vqrshl_s16(sum, shift_round_0);
|
||||
|
||||
return sum;
|
||||
}
|
||||
|
||||
static INLINE uint16x4_t convolve8_4x4_s32(
|
||||
const int16x4_t s0, const int16x4_t s1, const int16x4_t s2,
|
||||
const int16x4_t s3, const int16x4_t s4, const int16x4_t s5,
|
||||
const int16x4_t s6, const int16x4_t s7, const int16_t *y_filter,
|
||||
const int32x4_t round_shift_vec, const int32x4_t offset_const) {
|
||||
int32x4_t sum0;
|
||||
uint16x4_t res;
|
||||
const int32x4_t zero = vdupq_n_s32(0);
|
||||
|
||||
sum0 = vmull_n_s16(s0, y_filter[0]);
|
||||
sum0 = vmlal_n_s16(sum0, s1, y_filter[1]);
|
||||
sum0 = vmlal_n_s16(sum0, s2, y_filter[2]);
|
||||
sum0 = vmlal_n_s16(sum0, s3, y_filter[3]);
|
||||
sum0 = vmlal_n_s16(sum0, s4, y_filter[4]);
|
||||
sum0 = vmlal_n_s16(sum0, s5, y_filter[5]);
|
||||
sum0 = vmlal_n_s16(sum0, s6, y_filter[6]);
|
||||
sum0 = vmlal_n_s16(sum0, s7, y_filter[7]);
|
||||
|
||||
sum0 = vaddq_s32(sum0, offset_const);
|
||||
sum0 = vqrshlq_s32(sum0, round_shift_vec);
|
||||
sum0 = vmaxq_s32(sum0, zero);
|
||||
res = vmovn_u32(vreinterpretq_u32_s32(sum0));
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif // AV1_COMMON_ARM_CONVOLVE_NEON_H_
|
||||
79
third_party/aom/av1/common/arm/intrapred_neon.c
vendored
Normal file
79
third_party/aom/av1/common/arm/intrapred_neon.c
vendored
Normal file
|
|
@ -0,0 +1,79 @@
|
|||
/*
|
||||
*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
||||
#include <arm_neon.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "aom_mem/aom_mem.h"
|
||||
#include "aom_ports/mem.h"
|
||||
#include "av1/common/arm/mem_neon.h"
|
||||
#include "config/aom_dsp_rtcd.h"
|
||||
|
||||
static INLINE void highbd_dc_predictor_neon(uint16_t *dst, ptrdiff_t stride,
|
||||
int bw, const uint16_t *above,
|
||||
const uint16_t *left) {
|
||||
assert(bw >= 4);
|
||||
assert(IS_POWER_OF_TWO(bw));
|
||||
int expected_dc, sum = 0;
|
||||
const int count = bw * 2;
|
||||
uint32x4_t sum_q = vdupq_n_u32(0);
|
||||
uint32x2_t sum_d;
|
||||
uint16_t *dst_1;
|
||||
if (bw >= 8) {
|
||||
for (int i = 0; i < bw; i += 8) {
|
||||
sum_q = vpadalq_u16(sum_q, vld1q_u16(above));
|
||||
sum_q = vpadalq_u16(sum_q, vld1q_u16(left));
|
||||
above += 8;
|
||||
left += 8;
|
||||
}
|
||||
sum_d = vadd_u32(vget_low_u32(sum_q), vget_high_u32(sum_q));
|
||||
sum = vget_lane_s32(vreinterpret_s32_u64(vpaddl_u32(sum_d)), 0);
|
||||
expected_dc = (sum + (count >> 1)) / count;
|
||||
const uint16x8_t dc = vdupq_n_u16((uint16_t)expected_dc);
|
||||
for (int r = 0; r < bw; r++) {
|
||||
dst_1 = dst;
|
||||
for (int i = 0; i < bw; i += 8) {
|
||||
vst1q_u16(dst_1, dc);
|
||||
dst_1 += 8;
|
||||
}
|
||||
dst += stride;
|
||||
}
|
||||
} else { // 4x4
|
||||
sum_q = vaddl_u16(vld1_u16(above), vld1_u16(left));
|
||||
sum_d = vadd_u32(vget_low_u32(sum_q), vget_high_u32(sum_q));
|
||||
sum = vget_lane_s32(vreinterpret_s32_u64(vpaddl_u32(sum_d)), 0);
|
||||
expected_dc = (sum + (count >> 1)) / count;
|
||||
const uint16x4_t dc = vdup_n_u16((uint16_t)expected_dc);
|
||||
for (int r = 0; r < bw; r++) {
|
||||
vst1_u16(dst, dc);
|
||||
dst += stride;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#define intra_pred_highbd_sized(type, width) \
|
||||
void aom_highbd_##type##_predictor_##width##x##width##_neon( \
|
||||
uint16_t *dst, ptrdiff_t stride, const uint16_t *above, \
|
||||
const uint16_t *left, int bd) { \
|
||||
(void)bd; \
|
||||
highbd_##type##_predictor_neon(dst, stride, width, above, left); \
|
||||
}
|
||||
|
||||
#define intra_pred_square(type) \
|
||||
intra_pred_highbd_sized(type, 4); \
|
||||
intra_pred_highbd_sized(type, 8); \
|
||||
intra_pred_highbd_sized(type, 16); \
|
||||
intra_pred_highbd_sized(type, 32); \
|
||||
intra_pred_highbd_sized(type, 64);
|
||||
|
||||
intra_pred_square(dc);
|
||||
|
||||
#undef intra_pred_square
|
||||
1326
third_party/aom/av1/common/arm/jnt_convolve_neon.c
vendored
Normal file
1326
third_party/aom/av1/common/arm/jnt_convolve_neon.c
vendored
Normal file
File diff suppressed because it is too large
Load diff
401
third_party/aom/av1/common/arm/mem_neon.h
vendored
Normal file
401
third_party/aom/av1/common/arm/mem_neon.h
vendored
Normal file
|
|
@ -0,0 +1,401 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All Rights Reserved.
|
||||
*
|
||||
* Use of this source code is governed by a BSD-style license
|
||||
* that can be found in the LICENSE file in the root of the source
|
||||
* tree. An additional intellectual property rights grant can be found
|
||||
* in the file PATENTS. All contributing project authors may
|
||||
* be found in the AUTHORS file in the root of the source tree.
|
||||
*/
|
||||
|
||||
#ifndef AV1_COMMON_ARM_MEM_NEON_H_
|
||||
#define AV1_COMMON_ARM_MEM_NEON_H_
|
||||
|
||||
#include <arm_neon.h>
|
||||
#include <string.h>
|
||||
|
||||
static INLINE void store_row2_u8_8x8(uint8_t *s, int p, const uint8x8_t s0,
|
||||
const uint8x8_t s1) {
|
||||
vst1_u8(s, s0);
|
||||
s += p;
|
||||
vst1_u8(s, s1);
|
||||
s += p;
|
||||
}
|
||||
|
||||
static INLINE void load_u8_8x8(const uint8_t *s, ptrdiff_t p,
|
||||
uint8x8_t *const s0, uint8x8_t *const s1,
|
||||
uint8x8_t *const s2, uint8x8_t *const s3,
|
||||
uint8x8_t *const s4, uint8x8_t *const s5,
|
||||
uint8x8_t *const s6, uint8x8_t *const s7) {
|
||||
*s0 = vld1_u8(s);
|
||||
s += p;
|
||||
*s1 = vld1_u8(s);
|
||||
s += p;
|
||||
*s2 = vld1_u8(s);
|
||||
s += p;
|
||||
*s3 = vld1_u8(s);
|
||||
s += p;
|
||||
*s4 = vld1_u8(s);
|
||||
s += p;
|
||||
*s5 = vld1_u8(s);
|
||||
s += p;
|
||||
*s6 = vld1_u8(s);
|
||||
s += p;
|
||||
*s7 = vld1_u8(s);
|
||||
}
|
||||
|
||||
static INLINE void load_u8_8x16(const uint8_t *s, ptrdiff_t p,
|
||||
uint8x16_t *const s0, uint8x16_t *const s1,
|
||||
uint8x16_t *const s2, uint8x16_t *const s3) {
|
||||
*s0 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s1 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s2 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s3 = vld1q_u8(s);
|
||||
}
|
||||
|
||||
static INLINE void load_u8_8x4(const uint8_t *s, const ptrdiff_t p,
|
||||
uint8x8_t *const s0, uint8x8_t *const s1,
|
||||
uint8x8_t *const s2, uint8x8_t *const s3) {
|
||||
*s0 = vld1_u8(s);
|
||||
s += p;
|
||||
*s1 = vld1_u8(s);
|
||||
s += p;
|
||||
*s2 = vld1_u8(s);
|
||||
s += p;
|
||||
*s3 = vld1_u8(s);
|
||||
}
|
||||
|
||||
static INLINE void load_u16_4x4(const uint16_t *s, const ptrdiff_t p,
|
||||
uint16x4_t *const s0, uint16x4_t *const s1,
|
||||
uint16x4_t *const s2, uint16x4_t *const s3) {
|
||||
*s0 = vld1_u16(s);
|
||||
s += p;
|
||||
*s1 = vld1_u16(s);
|
||||
s += p;
|
||||
*s2 = vld1_u16(s);
|
||||
s += p;
|
||||
*s3 = vld1_u16(s);
|
||||
s += p;
|
||||
}
|
||||
|
||||
static INLINE void load_u16_8x4(const uint16_t *s, const ptrdiff_t p,
|
||||
uint16x8_t *const s0, uint16x8_t *const s1,
|
||||
uint16x8_t *const s2, uint16x8_t *const s3) {
|
||||
*s0 = vld1q_u16(s);
|
||||
s += p;
|
||||
*s1 = vld1q_u16(s);
|
||||
s += p;
|
||||
*s2 = vld1q_u16(s);
|
||||
s += p;
|
||||
*s3 = vld1q_u16(s);
|
||||
s += p;
|
||||
}
|
||||
|
||||
static INLINE void load_s16_4x8(const int16_t *s, ptrdiff_t p,
|
||||
int16x4_t *const s0, int16x4_t *const s1,
|
||||
int16x4_t *const s2, int16x4_t *const s3,
|
||||
int16x4_t *const s4, int16x4_t *const s5,
|
||||
int16x4_t *const s6, int16x4_t *const s7) {
|
||||
*s0 = vld1_s16(s);
|
||||
s += p;
|
||||
*s1 = vld1_s16(s);
|
||||
s += p;
|
||||
*s2 = vld1_s16(s);
|
||||
s += p;
|
||||
*s3 = vld1_s16(s);
|
||||
s += p;
|
||||
*s4 = vld1_s16(s);
|
||||
s += p;
|
||||
*s5 = vld1_s16(s);
|
||||
s += p;
|
||||
*s6 = vld1_s16(s);
|
||||
s += p;
|
||||
*s7 = vld1_s16(s);
|
||||
}
|
||||
|
||||
static INLINE void load_s16_4x4(const int16_t *s, ptrdiff_t p,
|
||||
int16x4_t *const s0, int16x4_t *const s1,
|
||||
int16x4_t *const s2, int16x4_t *const s3) {
|
||||
*s0 = vld1_s16(s);
|
||||
s += p;
|
||||
*s1 = vld1_s16(s);
|
||||
s += p;
|
||||
*s2 = vld1_s16(s);
|
||||
s += p;
|
||||
*s3 = vld1_s16(s);
|
||||
}
|
||||
|
||||
static INLINE void store_u8_8x8(uint8_t *s, ptrdiff_t p, const uint8x8_t s0,
|
||||
const uint8x8_t s1, const uint8x8_t s2,
|
||||
const uint8x8_t s3, const uint8x8_t s4,
|
||||
const uint8x8_t s5, const uint8x8_t s6,
|
||||
const uint8x8_t s7) {
|
||||
vst1_u8(s, s0);
|
||||
s += p;
|
||||
vst1_u8(s, s1);
|
||||
s += p;
|
||||
vst1_u8(s, s2);
|
||||
s += p;
|
||||
vst1_u8(s, s3);
|
||||
s += p;
|
||||
vst1_u8(s, s4);
|
||||
s += p;
|
||||
vst1_u8(s, s5);
|
||||
s += p;
|
||||
vst1_u8(s, s6);
|
||||
s += p;
|
||||
vst1_u8(s, s7);
|
||||
}
|
||||
|
||||
static INLINE void store_u8_8x4(uint8_t *s, ptrdiff_t p, const uint8x8_t s0,
|
||||
const uint8x8_t s1, const uint8x8_t s2,
|
||||
const uint8x8_t s3) {
|
||||
vst1_u8(s, s0);
|
||||
s += p;
|
||||
vst1_u8(s, s1);
|
||||
s += p;
|
||||
vst1_u8(s, s2);
|
||||
s += p;
|
||||
vst1_u8(s, s3);
|
||||
}
|
||||
|
||||
static INLINE void store_u8_8x16(uint8_t *s, ptrdiff_t p, const uint8x16_t s0,
|
||||
const uint8x16_t s1, const uint8x16_t s2,
|
||||
const uint8x16_t s3) {
|
||||
vst1q_u8(s, s0);
|
||||
s += p;
|
||||
vst1q_u8(s, s1);
|
||||
s += p;
|
||||
vst1q_u8(s, s2);
|
||||
s += p;
|
||||
vst1q_u8(s, s3);
|
||||
}
|
||||
|
||||
static INLINE void store_u16_8x8(uint16_t *s, ptrdiff_t dst_stride,
|
||||
const uint16x8_t s0, const uint16x8_t s1,
|
||||
const uint16x8_t s2, const uint16x8_t s3,
|
||||
const uint16x8_t s4, const uint16x8_t s5,
|
||||
const uint16x8_t s6, const uint16x8_t s7) {
|
||||
vst1q_u16(s, s0);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s1);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s2);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s3);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s4);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s5);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s6);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s7);
|
||||
}
|
||||
|
||||
static INLINE void store_u16_4x4(uint16_t *s, ptrdiff_t dst_stride,
|
||||
const uint16x4_t s0, const uint16x4_t s1,
|
||||
const uint16x4_t s2, const uint16x4_t s3) {
|
||||
vst1_u16(s, s0);
|
||||
s += dst_stride;
|
||||
vst1_u16(s, s1);
|
||||
s += dst_stride;
|
||||
vst1_u16(s, s2);
|
||||
s += dst_stride;
|
||||
vst1_u16(s, s3);
|
||||
}
|
||||
|
||||
static INLINE void store_u16_8x4(uint16_t *s, ptrdiff_t dst_stride,
|
||||
const uint16x8_t s0, const uint16x8_t s1,
|
||||
const uint16x8_t s2, const uint16x8_t s3) {
|
||||
vst1q_u16(s, s0);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s1);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s2);
|
||||
s += dst_stride;
|
||||
vst1q_u16(s, s3);
|
||||
}
|
||||
|
||||
static INLINE void store_s16_8x8(int16_t *s, ptrdiff_t dst_stride,
|
||||
const int16x8_t s0, const int16x8_t s1,
|
||||
const int16x8_t s2, const int16x8_t s3,
|
||||
const int16x8_t s4, const int16x8_t s5,
|
||||
const int16x8_t s6, const int16x8_t s7) {
|
||||
vst1q_s16(s, s0);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s1);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s2);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s3);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s4);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s5);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s6);
|
||||
s += dst_stride;
|
||||
vst1q_s16(s, s7);
|
||||
}
|
||||
|
||||
static INLINE void load_s16_8x8(const int16_t *s, ptrdiff_t p,
|
||||
int16x8_t *const s0, int16x8_t *const s1,
|
||||
int16x8_t *const s2, int16x8_t *const s3,
|
||||
int16x8_t *const s4, int16x8_t *const s5,
|
||||
int16x8_t *const s6, int16x8_t *const s7) {
|
||||
*s0 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s1 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s2 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s3 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s4 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s5 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s6 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s7 = vld1q_s16(s);
|
||||
}
|
||||
|
||||
static INLINE void load_s16_8x4(const int16_t *s, ptrdiff_t p,
|
||||
int16x8_t *const s0, int16x8_t *const s1,
|
||||
int16x8_t *const s2, int16x8_t *const s3) {
|
||||
*s0 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s1 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s2 = vld1q_s16(s);
|
||||
s += p;
|
||||
*s3 = vld1q_s16(s);
|
||||
}
|
||||
|
||||
static INLINE void load_unaligned_u8_4x8(const uint8_t *buf, int stride,
|
||||
uint32x2_t *tu0, uint32x2_t *tu1,
|
||||
uint32x2_t *tu2, uint32x2_t *tu3) {
|
||||
uint32_t a;
|
||||
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 1);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu1 = vset_lane_u32(a, *tu1, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu1 = vset_lane_u32(a, *tu1, 1);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu2 = vset_lane_u32(a, *tu2, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu2 = vset_lane_u32(a, *tu2, 1);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu3 = vset_lane_u32(a, *tu3, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
*tu3 = vset_lane_u32(a, *tu3, 1);
|
||||
}
|
||||
|
||||
static INLINE void load_unaligned_u8_4x4(const uint8_t *buf, int stride,
|
||||
uint32x2_t *tu0, uint32x2_t *tu1) {
|
||||
uint32_t a;
|
||||
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 1);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu1 = vset_lane_u32(a, *tu1, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
*tu1 = vset_lane_u32(a, *tu1, 1);
|
||||
}
|
||||
|
||||
static INLINE void load_unaligned_u8_4x2(const uint8_t *buf, int stride,
|
||||
uint32x2_t *tu0) {
|
||||
uint32_t a;
|
||||
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 0);
|
||||
memcpy(&a, buf, 4);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u32(a, *tu0, 1);
|
||||
}
|
||||
|
||||
static INLINE void load_unaligned_u8_2x2(const uint8_t *buf, int stride,
|
||||
uint16x4_t *tu0) {
|
||||
uint16_t a;
|
||||
|
||||
memcpy(&a, buf, 2);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u16(a, *tu0, 0);
|
||||
memcpy(&a, buf, 2);
|
||||
buf += stride;
|
||||
*tu0 = vset_lane_u16(a, *tu0, 1);
|
||||
}
|
||||
|
||||
static INLINE void load_u8_16x8(const uint8_t *s, ptrdiff_t p,
|
||||
uint8x16_t *const s0, uint8x16_t *const s1,
|
||||
uint8x16_t *const s2, uint8x16_t *const s3,
|
||||
uint8x16_t *const s4, uint8x16_t *const s5,
|
||||
uint8x16_t *const s6, uint8x16_t *const s7) {
|
||||
*s0 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s1 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s2 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s3 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s4 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s5 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s6 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s7 = vld1q_u8(s);
|
||||
}
|
||||
|
||||
static INLINE void load_u8_16x4(const uint8_t *s, ptrdiff_t p,
|
||||
uint8x16_t *const s0, uint8x16_t *const s1,
|
||||
uint8x16_t *const s2, uint8x16_t *const s3) {
|
||||
*s0 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s1 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s2 = vld1q_u8(s);
|
||||
s += p;
|
||||
*s3 = vld1q_u8(s);
|
||||
}
|
||||
|
||||
static INLINE void load_unaligned_u16_4x4(const uint16_t *buf, uint32_t stride,
|
||||
uint64x2_t *tu0, uint64x2_t *tu1) {
|
||||
uint64_t a;
|
||||
|
||||
memcpy(&a, buf, 8);
|
||||
buf += stride;
|
||||
*tu0 = vsetq_lane_u64(a, *tu0, 0);
|
||||
memcpy(&a, buf, 8);
|
||||
buf += stride;
|
||||
*tu0 = vsetq_lane_u64(a, *tu0, 1);
|
||||
memcpy(&a, buf, 8);
|
||||
buf += stride;
|
||||
*tu1 = vsetq_lane_u64(a, *tu1, 0);
|
||||
memcpy(&a, buf, 8);
|
||||
*tu1 = vsetq_lane_u64(a, *tu1, 1);
|
||||
}
|
||||
|
||||
#endif // AV1_COMMON_ARM_MEM_NEON_H_
|
||||
|
|
@ -1,228 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
||||
|
||||
#include <arm_neon.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "./aom_config.h"
|
||||
#include "./av1_rtcd.h"
|
||||
#include "aom_dsp/txfm_common.h"
|
||||
#include "av1/common/common.h"
|
||||
|
||||
static INLINE void TRANSPOSE4X4(int16x8_t *q8s16, int16x8_t *q9s16) {
|
||||
int32x4_t q8s32, q9s32;
|
||||
int16x4x2_t d0x2s16, d1x2s16;
|
||||
int32x4x2_t q0x2s32;
|
||||
|
||||
d0x2s16 = vtrn_s16(vget_low_s16(*q8s16), vget_high_s16(*q8s16));
|
||||
d1x2s16 = vtrn_s16(vget_low_s16(*q9s16), vget_high_s16(*q9s16));
|
||||
|
||||
q8s32 = vreinterpretq_s32_s16(vcombine_s16(d0x2s16.val[0], d0x2s16.val[1]));
|
||||
q9s32 = vreinterpretq_s32_s16(vcombine_s16(d1x2s16.val[0], d1x2s16.val[1]));
|
||||
q0x2s32 = vtrnq_s32(q8s32, q9s32);
|
||||
|
||||
*q8s16 = vreinterpretq_s16_s32(q0x2s32.val[0]);
|
||||
*q9s16 = vreinterpretq_s16_s32(q0x2s32.val[1]);
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void GENERATE_COSINE_CONSTANTS(int16x4_t *d0s16, int16x4_t *d1s16,
|
||||
int16x4_t *d2s16) {
|
||||
*d0s16 = vdup_n_s16((int16_t)cospi_8_64);
|
||||
*d1s16 = vdup_n_s16((int16_t)cospi_16_64);
|
||||
*d2s16 = vdup_n_s16((int16_t)cospi_24_64);
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void GENERATE_SINE_CONSTANTS(int16x4_t *d3s16, int16x4_t *d4s16,
|
||||
int16x4_t *d5s16, int16x8_t *q3s16) {
|
||||
*d3s16 = vdup_n_s16((int16_t)sinpi_1_9);
|
||||
*d4s16 = vdup_n_s16((int16_t)sinpi_2_9);
|
||||
*q3s16 = vdupq_n_s16((int16_t)sinpi_3_9);
|
||||
*d5s16 = vdup_n_s16((int16_t)sinpi_4_9);
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void IDCT4x4_1D(int16x4_t *d0s16, int16x4_t *d1s16,
|
||||
int16x4_t *d2s16, int16x8_t *q8s16,
|
||||
int16x8_t *q9s16) {
|
||||
int16x4_t d16s16, d17s16, d18s16, d19s16, d23s16, d24s16;
|
||||
int16x4_t d26s16, d27s16, d28s16, d29s16;
|
||||
int32x4_t q10s32, q13s32, q14s32, q15s32;
|
||||
int16x8_t q13s16, q14s16;
|
||||
|
||||
d16s16 = vget_low_s16(*q8s16);
|
||||
d17s16 = vget_high_s16(*q8s16);
|
||||
d18s16 = vget_low_s16(*q9s16);
|
||||
d19s16 = vget_high_s16(*q9s16);
|
||||
|
||||
d23s16 = vadd_s16(d16s16, d18s16);
|
||||
d24s16 = vsub_s16(d16s16, d18s16);
|
||||
|
||||
q15s32 = vmull_s16(d17s16, *d2s16);
|
||||
q10s32 = vmull_s16(d17s16, *d0s16);
|
||||
q13s32 = vmull_s16(d23s16, *d1s16);
|
||||
q14s32 = vmull_s16(d24s16, *d1s16);
|
||||
q15s32 = vmlsl_s16(q15s32, d19s16, *d0s16);
|
||||
q10s32 = vmlal_s16(q10s32, d19s16, *d2s16);
|
||||
|
||||
d26s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
d27s16 = vqrshrn_n_s32(q14s32, 14);
|
||||
d29s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
d28s16 = vqrshrn_n_s32(q10s32, 14);
|
||||
|
||||
q13s16 = vcombine_s16(d26s16, d27s16);
|
||||
q14s16 = vcombine_s16(d28s16, d29s16);
|
||||
*q8s16 = vaddq_s16(q13s16, q14s16);
|
||||
*q9s16 = vsubq_s16(q13s16, q14s16);
|
||||
*q9s16 = vcombine_s16(vget_high_s16(*q9s16), vget_low_s16(*q9s16)); // vswp
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void IADST4x4_1D(int16x4_t *d3s16, int16x4_t *d4s16,
|
||||
int16x4_t *d5s16, int16x8_t *q3s16,
|
||||
int16x8_t *q8s16, int16x8_t *q9s16) {
|
||||
int16x4_t d6s16, d16s16, d17s16, d18s16, d19s16;
|
||||
int32x4_t q8s32, q9s32, q10s32, q11s32, q12s32, q13s32, q14s32, q15s32;
|
||||
|
||||
d6s16 = vget_low_s16(*q3s16);
|
||||
|
||||
d16s16 = vget_low_s16(*q8s16);
|
||||
d17s16 = vget_high_s16(*q8s16);
|
||||
d18s16 = vget_low_s16(*q9s16);
|
||||
d19s16 = vget_high_s16(*q9s16);
|
||||
|
||||
q10s32 = vmull_s16(*d3s16, d16s16);
|
||||
q11s32 = vmull_s16(*d4s16, d16s16);
|
||||
q12s32 = vmull_s16(d6s16, d17s16);
|
||||
q13s32 = vmull_s16(*d5s16, d18s16);
|
||||
q14s32 = vmull_s16(*d3s16, d18s16);
|
||||
q15s32 = vmovl_s16(d16s16);
|
||||
q15s32 = vaddw_s16(q15s32, d19s16);
|
||||
q8s32 = vmull_s16(*d4s16, d19s16);
|
||||
q15s32 = vsubw_s16(q15s32, d18s16);
|
||||
q9s32 = vmull_s16(*d5s16, d19s16);
|
||||
|
||||
q10s32 = vaddq_s32(q10s32, q13s32);
|
||||
q10s32 = vaddq_s32(q10s32, q8s32);
|
||||
q11s32 = vsubq_s32(q11s32, q14s32);
|
||||
q8s32 = vdupq_n_s32((int32_t)sinpi_3_9);
|
||||
q11s32 = vsubq_s32(q11s32, q9s32);
|
||||
q15s32 = vmulq_s32(q15s32, q8s32);
|
||||
|
||||
q13s32 = vaddq_s32(q10s32, q12s32);
|
||||
q10s32 = vaddq_s32(q10s32, q11s32);
|
||||
q14s32 = vaddq_s32(q11s32, q12s32);
|
||||
q10s32 = vsubq_s32(q10s32, q12s32);
|
||||
|
||||
d16s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
d17s16 = vqrshrn_n_s32(q14s32, 14);
|
||||
d18s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
d19s16 = vqrshrn_n_s32(q10s32, 14);
|
||||
|
||||
*q8s16 = vcombine_s16(d16s16, d17s16);
|
||||
*q9s16 = vcombine_s16(d18s16, d19s16);
|
||||
return;
|
||||
}
|
||||
|
||||
void av1_iht4x4_16_add_neon(const tran_low_t *input, uint8_t *dest,
|
||||
int dest_stride, const TxfmParam *txfm_param) {
|
||||
uint8x8_t d26u8, d27u8;
|
||||
int16x4_t d0s16, d1s16, d2s16, d3s16, d4s16, d5s16;
|
||||
uint32x2_t d26u32, d27u32;
|
||||
int16x8_t q3s16, q8s16, q9s16;
|
||||
uint16x8_t q8u16, q9u16;
|
||||
|
||||
d26u32 = d27u32 = vdup_n_u32(0);
|
||||
|
||||
q8s16 = vld1q_s16(input);
|
||||
q9s16 = vld1q_s16(input + 8);
|
||||
|
||||
TRANSPOSE4X4(&q8s16, &q9s16);
|
||||
|
||||
const TX_TYPE tx_type = txfm_param->tx_type;
|
||||
switch (tx_type) {
|
||||
case DCT_DCT: // idct_idct is not supported. Fall back to C
|
||||
av1_iht4x4_16_add_c(input, dest, dest_stride, txfm_param);
|
||||
return;
|
||||
break;
|
||||
case ADST_DCT: // iadst_idct
|
||||
// generate constants
|
||||
GENERATE_COSINE_CONSTANTS(&d0s16, &d1s16, &d2s16);
|
||||
GENERATE_SINE_CONSTANTS(&d3s16, &d4s16, &d5s16, &q3s16);
|
||||
|
||||
// first transform rows
|
||||
IDCT4x4_1D(&d0s16, &d1s16, &d2s16, &q8s16, &q9s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE4X4(&q8s16, &q9s16);
|
||||
|
||||
// then transform columns
|
||||
IADST4x4_1D(&d3s16, &d4s16, &d5s16, &q3s16, &q8s16, &q9s16);
|
||||
break;
|
||||
case DCT_ADST: // idct_iadst
|
||||
// generate constantsyy
|
||||
GENERATE_COSINE_CONSTANTS(&d0s16, &d1s16, &d2s16);
|
||||
GENERATE_SINE_CONSTANTS(&d3s16, &d4s16, &d5s16, &q3s16);
|
||||
|
||||
// first transform rows
|
||||
IADST4x4_1D(&d3s16, &d4s16, &d5s16, &q3s16, &q8s16, &q9s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE4X4(&q8s16, &q9s16);
|
||||
|
||||
// then transform columns
|
||||
IDCT4x4_1D(&d0s16, &d1s16, &d2s16, &q8s16, &q9s16);
|
||||
break;
|
||||
case ADST_ADST: // iadst_iadst
|
||||
// generate constants
|
||||
GENERATE_SINE_CONSTANTS(&d3s16, &d4s16, &d5s16, &q3s16);
|
||||
|
||||
// first transform rows
|
||||
IADST4x4_1D(&d3s16, &d4s16, &d5s16, &q3s16, &q8s16, &q9s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE4X4(&q8s16, &q9s16);
|
||||
|
||||
// then transform columns
|
||||
IADST4x4_1D(&d3s16, &d4s16, &d5s16, &q3s16, &q8s16, &q9s16);
|
||||
break;
|
||||
default: // iadst_idct
|
||||
assert(0);
|
||||
break;
|
||||
}
|
||||
|
||||
q8s16 = vrshrq_n_s16(q8s16, 4);
|
||||
q9s16 = vrshrq_n_s16(q9s16, 4);
|
||||
|
||||
d26u32 = vld1_lane_u32((const uint32_t *)dest, d26u32, 0);
|
||||
dest += dest_stride;
|
||||
d26u32 = vld1_lane_u32((const uint32_t *)dest, d26u32, 1);
|
||||
dest += dest_stride;
|
||||
d27u32 = vld1_lane_u32((const uint32_t *)dest, d27u32, 0);
|
||||
dest += dest_stride;
|
||||
d27u32 = vld1_lane_u32((const uint32_t *)dest, d27u32, 1);
|
||||
|
||||
q8u16 = vaddw_u8(vreinterpretq_u16_s16(q8s16), vreinterpret_u8_u32(d26u32));
|
||||
q9u16 = vaddw_u8(vreinterpretq_u16_s16(q9s16), vreinterpret_u8_u32(d27u32));
|
||||
|
||||
d26u8 = vqmovun_s16(vreinterpretq_s16_u16(q8u16));
|
||||
d27u8 = vqmovun_s16(vreinterpretq_s16_u16(q9u16));
|
||||
|
||||
vst1_lane_u32((uint32_t *)dest, vreinterpret_u32_u8(d27u8), 1);
|
||||
dest -= dest_stride;
|
||||
vst1_lane_u32((uint32_t *)dest, vreinterpret_u32_u8(d27u8), 0);
|
||||
dest -= dest_stride;
|
||||
vst1_lane_u32((uint32_t *)dest, vreinterpret_u32_u8(d26u8), 1);
|
||||
dest -= dest_stride;
|
||||
vst1_lane_u32((uint32_t *)dest, vreinterpret_u32_u8(d26u8), 0);
|
||||
return;
|
||||
}
|
||||
|
|
@ -1,594 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2016, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
||||
|
||||
#include <arm_neon.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "./aom_config.h"
|
||||
#include "./av1_rtcd.h"
|
||||
#include "aom_dsp/txfm_common.h"
|
||||
#include "av1/common/common.h"
|
||||
|
||||
static INLINE void TRANSPOSE8X8(int16x8_t *q8s16, int16x8_t *q9s16,
|
||||
int16x8_t *q10s16, int16x8_t *q11s16,
|
||||
int16x8_t *q12s16, int16x8_t *q13s16,
|
||||
int16x8_t *q14s16, int16x8_t *q15s16) {
|
||||
int16x4_t d16s16, d17s16, d18s16, d19s16, d20s16, d21s16, d22s16, d23s16;
|
||||
int16x4_t d24s16, d25s16, d26s16, d27s16, d28s16, d29s16, d30s16, d31s16;
|
||||
int32x4x2_t q0x2s32, q1x2s32, q2x2s32, q3x2s32;
|
||||
int16x8x2_t q0x2s16, q1x2s16, q2x2s16, q3x2s16;
|
||||
|
||||
d16s16 = vget_low_s16(*q8s16);
|
||||
d17s16 = vget_high_s16(*q8s16);
|
||||
d18s16 = vget_low_s16(*q9s16);
|
||||
d19s16 = vget_high_s16(*q9s16);
|
||||
d20s16 = vget_low_s16(*q10s16);
|
||||
d21s16 = vget_high_s16(*q10s16);
|
||||
d22s16 = vget_low_s16(*q11s16);
|
||||
d23s16 = vget_high_s16(*q11s16);
|
||||
d24s16 = vget_low_s16(*q12s16);
|
||||
d25s16 = vget_high_s16(*q12s16);
|
||||
d26s16 = vget_low_s16(*q13s16);
|
||||
d27s16 = vget_high_s16(*q13s16);
|
||||
d28s16 = vget_low_s16(*q14s16);
|
||||
d29s16 = vget_high_s16(*q14s16);
|
||||
d30s16 = vget_low_s16(*q15s16);
|
||||
d31s16 = vget_high_s16(*q15s16);
|
||||
|
||||
*q8s16 = vcombine_s16(d16s16, d24s16); // vswp d17, d24
|
||||
*q9s16 = vcombine_s16(d18s16, d26s16); // vswp d19, d26
|
||||
*q10s16 = vcombine_s16(d20s16, d28s16); // vswp d21, d28
|
||||
*q11s16 = vcombine_s16(d22s16, d30s16); // vswp d23, d30
|
||||
*q12s16 = vcombine_s16(d17s16, d25s16);
|
||||
*q13s16 = vcombine_s16(d19s16, d27s16);
|
||||
*q14s16 = vcombine_s16(d21s16, d29s16);
|
||||
*q15s16 = vcombine_s16(d23s16, d31s16);
|
||||
|
||||
q0x2s32 =
|
||||
vtrnq_s32(vreinterpretq_s32_s16(*q8s16), vreinterpretq_s32_s16(*q10s16));
|
||||
q1x2s32 =
|
||||
vtrnq_s32(vreinterpretq_s32_s16(*q9s16), vreinterpretq_s32_s16(*q11s16));
|
||||
q2x2s32 =
|
||||
vtrnq_s32(vreinterpretq_s32_s16(*q12s16), vreinterpretq_s32_s16(*q14s16));
|
||||
q3x2s32 =
|
||||
vtrnq_s32(vreinterpretq_s32_s16(*q13s16), vreinterpretq_s32_s16(*q15s16));
|
||||
|
||||
q0x2s16 = vtrnq_s16(vreinterpretq_s16_s32(q0x2s32.val[0]), // q8
|
||||
vreinterpretq_s16_s32(q1x2s32.val[0])); // q9
|
||||
q1x2s16 = vtrnq_s16(vreinterpretq_s16_s32(q0x2s32.val[1]), // q10
|
||||
vreinterpretq_s16_s32(q1x2s32.val[1])); // q11
|
||||
q2x2s16 = vtrnq_s16(vreinterpretq_s16_s32(q2x2s32.val[0]), // q12
|
||||
vreinterpretq_s16_s32(q3x2s32.val[0])); // q13
|
||||
q3x2s16 = vtrnq_s16(vreinterpretq_s16_s32(q2x2s32.val[1]), // q14
|
||||
vreinterpretq_s16_s32(q3x2s32.val[1])); // q15
|
||||
|
||||
*q8s16 = q0x2s16.val[0];
|
||||
*q9s16 = q0x2s16.val[1];
|
||||
*q10s16 = q1x2s16.val[0];
|
||||
*q11s16 = q1x2s16.val[1];
|
||||
*q12s16 = q2x2s16.val[0];
|
||||
*q13s16 = q2x2s16.val[1];
|
||||
*q14s16 = q3x2s16.val[0];
|
||||
*q15s16 = q3x2s16.val[1];
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void IDCT8x8_1D(int16x8_t *q8s16, int16x8_t *q9s16,
|
||||
int16x8_t *q10s16, int16x8_t *q11s16,
|
||||
int16x8_t *q12s16, int16x8_t *q13s16,
|
||||
int16x8_t *q14s16, int16x8_t *q15s16) {
|
||||
int16x4_t d0s16, d1s16, d2s16, d3s16;
|
||||
int16x4_t d8s16, d9s16, d10s16, d11s16, d12s16, d13s16, d14s16, d15s16;
|
||||
int16x4_t d16s16, d17s16, d18s16, d19s16, d20s16, d21s16, d22s16, d23s16;
|
||||
int16x4_t d24s16, d25s16, d26s16, d27s16, d28s16, d29s16, d30s16, d31s16;
|
||||
int16x8_t q0s16, q1s16, q2s16, q3s16, q4s16, q5s16, q6s16, q7s16;
|
||||
int32x4_t q2s32, q3s32, q5s32, q6s32, q8s32, q9s32;
|
||||
int32x4_t q10s32, q11s32, q12s32, q13s32, q15s32;
|
||||
|
||||
d0s16 = vdup_n_s16((int16_t)cospi_28_64);
|
||||
d1s16 = vdup_n_s16((int16_t)cospi_4_64);
|
||||
d2s16 = vdup_n_s16((int16_t)cospi_12_64);
|
||||
d3s16 = vdup_n_s16((int16_t)cospi_20_64);
|
||||
|
||||
d16s16 = vget_low_s16(*q8s16);
|
||||
d17s16 = vget_high_s16(*q8s16);
|
||||
d18s16 = vget_low_s16(*q9s16);
|
||||
d19s16 = vget_high_s16(*q9s16);
|
||||
d20s16 = vget_low_s16(*q10s16);
|
||||
d21s16 = vget_high_s16(*q10s16);
|
||||
d22s16 = vget_low_s16(*q11s16);
|
||||
d23s16 = vget_high_s16(*q11s16);
|
||||
d24s16 = vget_low_s16(*q12s16);
|
||||
d25s16 = vget_high_s16(*q12s16);
|
||||
d26s16 = vget_low_s16(*q13s16);
|
||||
d27s16 = vget_high_s16(*q13s16);
|
||||
d28s16 = vget_low_s16(*q14s16);
|
||||
d29s16 = vget_high_s16(*q14s16);
|
||||
d30s16 = vget_low_s16(*q15s16);
|
||||
d31s16 = vget_high_s16(*q15s16);
|
||||
|
||||
q2s32 = vmull_s16(d18s16, d0s16);
|
||||
q3s32 = vmull_s16(d19s16, d0s16);
|
||||
q5s32 = vmull_s16(d26s16, d2s16);
|
||||
q6s32 = vmull_s16(d27s16, d2s16);
|
||||
|
||||
q2s32 = vmlsl_s16(q2s32, d30s16, d1s16);
|
||||
q3s32 = vmlsl_s16(q3s32, d31s16, d1s16);
|
||||
q5s32 = vmlsl_s16(q5s32, d22s16, d3s16);
|
||||
q6s32 = vmlsl_s16(q6s32, d23s16, d3s16);
|
||||
|
||||
d8s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d9s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d10s16 = vqrshrn_n_s32(q5s32, 14);
|
||||
d11s16 = vqrshrn_n_s32(q6s32, 14);
|
||||
q4s16 = vcombine_s16(d8s16, d9s16);
|
||||
q5s16 = vcombine_s16(d10s16, d11s16);
|
||||
|
||||
q2s32 = vmull_s16(d18s16, d1s16);
|
||||
q3s32 = vmull_s16(d19s16, d1s16);
|
||||
q9s32 = vmull_s16(d26s16, d3s16);
|
||||
q13s32 = vmull_s16(d27s16, d3s16);
|
||||
|
||||
q2s32 = vmlal_s16(q2s32, d30s16, d0s16);
|
||||
q3s32 = vmlal_s16(q3s32, d31s16, d0s16);
|
||||
q9s32 = vmlal_s16(q9s32, d22s16, d2s16);
|
||||
q13s32 = vmlal_s16(q13s32, d23s16, d2s16);
|
||||
|
||||
d14s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d15s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d12s16 = vqrshrn_n_s32(q9s32, 14);
|
||||
d13s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
q6s16 = vcombine_s16(d12s16, d13s16);
|
||||
q7s16 = vcombine_s16(d14s16, d15s16);
|
||||
|
||||
d0s16 = vdup_n_s16((int16_t)cospi_16_64);
|
||||
|
||||
q2s32 = vmull_s16(d16s16, d0s16);
|
||||
q3s32 = vmull_s16(d17s16, d0s16);
|
||||
q13s32 = vmull_s16(d16s16, d0s16);
|
||||
q15s32 = vmull_s16(d17s16, d0s16);
|
||||
|
||||
q2s32 = vmlal_s16(q2s32, d24s16, d0s16);
|
||||
q3s32 = vmlal_s16(q3s32, d25s16, d0s16);
|
||||
q13s32 = vmlsl_s16(q13s32, d24s16, d0s16);
|
||||
q15s32 = vmlsl_s16(q15s32, d25s16, d0s16);
|
||||
|
||||
d0s16 = vdup_n_s16((int16_t)cospi_24_64);
|
||||
d1s16 = vdup_n_s16((int16_t)cospi_8_64);
|
||||
|
||||
d18s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d19s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d22s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
d23s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
*q9s16 = vcombine_s16(d18s16, d19s16);
|
||||
*q11s16 = vcombine_s16(d22s16, d23s16);
|
||||
|
||||
q2s32 = vmull_s16(d20s16, d0s16);
|
||||
q3s32 = vmull_s16(d21s16, d0s16);
|
||||
q8s32 = vmull_s16(d20s16, d1s16);
|
||||
q12s32 = vmull_s16(d21s16, d1s16);
|
||||
|
||||
q2s32 = vmlsl_s16(q2s32, d28s16, d1s16);
|
||||
q3s32 = vmlsl_s16(q3s32, d29s16, d1s16);
|
||||
q8s32 = vmlal_s16(q8s32, d28s16, d0s16);
|
||||
q12s32 = vmlal_s16(q12s32, d29s16, d0s16);
|
||||
|
||||
d26s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d27s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d30s16 = vqrshrn_n_s32(q8s32, 14);
|
||||
d31s16 = vqrshrn_n_s32(q12s32, 14);
|
||||
*q13s16 = vcombine_s16(d26s16, d27s16);
|
||||
*q15s16 = vcombine_s16(d30s16, d31s16);
|
||||
|
||||
q0s16 = vaddq_s16(*q9s16, *q15s16);
|
||||
q1s16 = vaddq_s16(*q11s16, *q13s16);
|
||||
q2s16 = vsubq_s16(*q11s16, *q13s16);
|
||||
q3s16 = vsubq_s16(*q9s16, *q15s16);
|
||||
|
||||
*q13s16 = vsubq_s16(q4s16, q5s16);
|
||||
q4s16 = vaddq_s16(q4s16, q5s16);
|
||||
*q14s16 = vsubq_s16(q7s16, q6s16);
|
||||
q7s16 = vaddq_s16(q7s16, q6s16);
|
||||
d26s16 = vget_low_s16(*q13s16);
|
||||
d27s16 = vget_high_s16(*q13s16);
|
||||
d28s16 = vget_low_s16(*q14s16);
|
||||
d29s16 = vget_high_s16(*q14s16);
|
||||
|
||||
d16s16 = vdup_n_s16((int16_t)cospi_16_64);
|
||||
|
||||
q9s32 = vmull_s16(d28s16, d16s16);
|
||||
q10s32 = vmull_s16(d29s16, d16s16);
|
||||
q11s32 = vmull_s16(d28s16, d16s16);
|
||||
q12s32 = vmull_s16(d29s16, d16s16);
|
||||
|
||||
q9s32 = vmlsl_s16(q9s32, d26s16, d16s16);
|
||||
q10s32 = vmlsl_s16(q10s32, d27s16, d16s16);
|
||||
q11s32 = vmlal_s16(q11s32, d26s16, d16s16);
|
||||
q12s32 = vmlal_s16(q12s32, d27s16, d16s16);
|
||||
|
||||
d10s16 = vqrshrn_n_s32(q9s32, 14);
|
||||
d11s16 = vqrshrn_n_s32(q10s32, 14);
|
||||
d12s16 = vqrshrn_n_s32(q11s32, 14);
|
||||
d13s16 = vqrshrn_n_s32(q12s32, 14);
|
||||
q5s16 = vcombine_s16(d10s16, d11s16);
|
||||
q6s16 = vcombine_s16(d12s16, d13s16);
|
||||
|
||||
*q8s16 = vaddq_s16(q0s16, q7s16);
|
||||
*q9s16 = vaddq_s16(q1s16, q6s16);
|
||||
*q10s16 = vaddq_s16(q2s16, q5s16);
|
||||
*q11s16 = vaddq_s16(q3s16, q4s16);
|
||||
*q12s16 = vsubq_s16(q3s16, q4s16);
|
||||
*q13s16 = vsubq_s16(q2s16, q5s16);
|
||||
*q14s16 = vsubq_s16(q1s16, q6s16);
|
||||
*q15s16 = vsubq_s16(q0s16, q7s16);
|
||||
return;
|
||||
}
|
||||
|
||||
static INLINE void IADST8X8_1D(int16x8_t *q8s16, int16x8_t *q9s16,
|
||||
int16x8_t *q10s16, int16x8_t *q11s16,
|
||||
int16x8_t *q12s16, int16x8_t *q13s16,
|
||||
int16x8_t *q14s16, int16x8_t *q15s16) {
|
||||
int16x4_t d0s16, d1s16, d2s16, d3s16, d4s16, d5s16, d6s16, d7s16;
|
||||
int16x4_t d8s16, d9s16, d10s16, d11s16, d12s16, d13s16, d14s16, d15s16;
|
||||
int16x4_t d16s16, d17s16, d18s16, d19s16, d20s16, d21s16, d22s16, d23s16;
|
||||
int16x4_t d24s16, d25s16, d26s16, d27s16, d28s16, d29s16, d30s16, d31s16;
|
||||
int16x8_t q2s16, q4s16, q5s16, q6s16;
|
||||
int32x4_t q0s32, q1s32, q2s32, q3s32, q4s32, q5s32, q6s32, q7s32, q8s32;
|
||||
int32x4_t q9s32, q10s32, q11s32, q12s32, q13s32, q14s32, q15s32;
|
||||
|
||||
d16s16 = vget_low_s16(*q8s16);
|
||||
d17s16 = vget_high_s16(*q8s16);
|
||||
d18s16 = vget_low_s16(*q9s16);
|
||||
d19s16 = vget_high_s16(*q9s16);
|
||||
d20s16 = vget_low_s16(*q10s16);
|
||||
d21s16 = vget_high_s16(*q10s16);
|
||||
d22s16 = vget_low_s16(*q11s16);
|
||||
d23s16 = vget_high_s16(*q11s16);
|
||||
d24s16 = vget_low_s16(*q12s16);
|
||||
d25s16 = vget_high_s16(*q12s16);
|
||||
d26s16 = vget_low_s16(*q13s16);
|
||||
d27s16 = vget_high_s16(*q13s16);
|
||||
d28s16 = vget_low_s16(*q14s16);
|
||||
d29s16 = vget_high_s16(*q14s16);
|
||||
d30s16 = vget_low_s16(*q15s16);
|
||||
d31s16 = vget_high_s16(*q15s16);
|
||||
|
||||
d14s16 = vdup_n_s16((int16_t)cospi_2_64);
|
||||
d15s16 = vdup_n_s16((int16_t)cospi_30_64);
|
||||
|
||||
q1s32 = vmull_s16(d30s16, d14s16);
|
||||
q2s32 = vmull_s16(d31s16, d14s16);
|
||||
q3s32 = vmull_s16(d30s16, d15s16);
|
||||
q4s32 = vmull_s16(d31s16, d15s16);
|
||||
|
||||
d30s16 = vdup_n_s16((int16_t)cospi_18_64);
|
||||
d31s16 = vdup_n_s16((int16_t)cospi_14_64);
|
||||
|
||||
q1s32 = vmlal_s16(q1s32, d16s16, d15s16);
|
||||
q2s32 = vmlal_s16(q2s32, d17s16, d15s16);
|
||||
q3s32 = vmlsl_s16(q3s32, d16s16, d14s16);
|
||||
q4s32 = vmlsl_s16(q4s32, d17s16, d14s16);
|
||||
|
||||
q5s32 = vmull_s16(d22s16, d30s16);
|
||||
q6s32 = vmull_s16(d23s16, d30s16);
|
||||
q7s32 = vmull_s16(d22s16, d31s16);
|
||||
q8s32 = vmull_s16(d23s16, d31s16);
|
||||
|
||||
q5s32 = vmlal_s16(q5s32, d24s16, d31s16);
|
||||
q6s32 = vmlal_s16(q6s32, d25s16, d31s16);
|
||||
q7s32 = vmlsl_s16(q7s32, d24s16, d30s16);
|
||||
q8s32 = vmlsl_s16(q8s32, d25s16, d30s16);
|
||||
|
||||
q11s32 = vaddq_s32(q1s32, q5s32);
|
||||
q12s32 = vaddq_s32(q2s32, q6s32);
|
||||
q1s32 = vsubq_s32(q1s32, q5s32);
|
||||
q2s32 = vsubq_s32(q2s32, q6s32);
|
||||
|
||||
d22s16 = vqrshrn_n_s32(q11s32, 14);
|
||||
d23s16 = vqrshrn_n_s32(q12s32, 14);
|
||||
*q11s16 = vcombine_s16(d22s16, d23s16);
|
||||
|
||||
q12s32 = vaddq_s32(q3s32, q7s32);
|
||||
q15s32 = vaddq_s32(q4s32, q8s32);
|
||||
q3s32 = vsubq_s32(q3s32, q7s32);
|
||||
q4s32 = vsubq_s32(q4s32, q8s32);
|
||||
|
||||
d2s16 = vqrshrn_n_s32(q1s32, 14);
|
||||
d3s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d24s16 = vqrshrn_n_s32(q12s32, 14);
|
||||
d25s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
d6s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d7s16 = vqrshrn_n_s32(q4s32, 14);
|
||||
*q12s16 = vcombine_s16(d24s16, d25s16);
|
||||
|
||||
d0s16 = vdup_n_s16((int16_t)cospi_10_64);
|
||||
d1s16 = vdup_n_s16((int16_t)cospi_22_64);
|
||||
q4s32 = vmull_s16(d26s16, d0s16);
|
||||
q5s32 = vmull_s16(d27s16, d0s16);
|
||||
q2s32 = vmull_s16(d26s16, d1s16);
|
||||
q6s32 = vmull_s16(d27s16, d1s16);
|
||||
|
||||
d30s16 = vdup_n_s16((int16_t)cospi_26_64);
|
||||
d31s16 = vdup_n_s16((int16_t)cospi_6_64);
|
||||
|
||||
q4s32 = vmlal_s16(q4s32, d20s16, d1s16);
|
||||
q5s32 = vmlal_s16(q5s32, d21s16, d1s16);
|
||||
q2s32 = vmlsl_s16(q2s32, d20s16, d0s16);
|
||||
q6s32 = vmlsl_s16(q6s32, d21s16, d0s16);
|
||||
|
||||
q0s32 = vmull_s16(d18s16, d30s16);
|
||||
q13s32 = vmull_s16(d19s16, d30s16);
|
||||
|
||||
q0s32 = vmlal_s16(q0s32, d28s16, d31s16);
|
||||
q13s32 = vmlal_s16(q13s32, d29s16, d31s16);
|
||||
|
||||
q10s32 = vmull_s16(d18s16, d31s16);
|
||||
q9s32 = vmull_s16(d19s16, d31s16);
|
||||
|
||||
q10s32 = vmlsl_s16(q10s32, d28s16, d30s16);
|
||||
q9s32 = vmlsl_s16(q9s32, d29s16, d30s16);
|
||||
|
||||
q14s32 = vaddq_s32(q2s32, q10s32);
|
||||
q15s32 = vaddq_s32(q6s32, q9s32);
|
||||
q2s32 = vsubq_s32(q2s32, q10s32);
|
||||
q6s32 = vsubq_s32(q6s32, q9s32);
|
||||
|
||||
d28s16 = vqrshrn_n_s32(q14s32, 14);
|
||||
d29s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
d4s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d5s16 = vqrshrn_n_s32(q6s32, 14);
|
||||
*q14s16 = vcombine_s16(d28s16, d29s16);
|
||||
|
||||
q9s32 = vaddq_s32(q4s32, q0s32);
|
||||
q10s32 = vaddq_s32(q5s32, q13s32);
|
||||
q4s32 = vsubq_s32(q4s32, q0s32);
|
||||
q5s32 = vsubq_s32(q5s32, q13s32);
|
||||
|
||||
d30s16 = vdup_n_s16((int16_t)cospi_8_64);
|
||||
d31s16 = vdup_n_s16((int16_t)cospi_24_64);
|
||||
|
||||
d18s16 = vqrshrn_n_s32(q9s32, 14);
|
||||
d19s16 = vqrshrn_n_s32(q10s32, 14);
|
||||
d8s16 = vqrshrn_n_s32(q4s32, 14);
|
||||
d9s16 = vqrshrn_n_s32(q5s32, 14);
|
||||
*q9s16 = vcombine_s16(d18s16, d19s16);
|
||||
|
||||
q5s32 = vmull_s16(d2s16, d30s16);
|
||||
q6s32 = vmull_s16(d3s16, d30s16);
|
||||
q7s32 = vmull_s16(d2s16, d31s16);
|
||||
q0s32 = vmull_s16(d3s16, d31s16);
|
||||
|
||||
q5s32 = vmlal_s16(q5s32, d6s16, d31s16);
|
||||
q6s32 = vmlal_s16(q6s32, d7s16, d31s16);
|
||||
q7s32 = vmlsl_s16(q7s32, d6s16, d30s16);
|
||||
q0s32 = vmlsl_s16(q0s32, d7s16, d30s16);
|
||||
|
||||
q1s32 = vmull_s16(d4s16, d30s16);
|
||||
q3s32 = vmull_s16(d5s16, d30s16);
|
||||
q10s32 = vmull_s16(d4s16, d31s16);
|
||||
q2s32 = vmull_s16(d5s16, d31s16);
|
||||
|
||||
q1s32 = vmlsl_s16(q1s32, d8s16, d31s16);
|
||||
q3s32 = vmlsl_s16(q3s32, d9s16, d31s16);
|
||||
q10s32 = vmlal_s16(q10s32, d8s16, d30s16);
|
||||
q2s32 = vmlal_s16(q2s32, d9s16, d30s16);
|
||||
|
||||
*q8s16 = vaddq_s16(*q11s16, *q9s16);
|
||||
*q11s16 = vsubq_s16(*q11s16, *q9s16);
|
||||
q4s16 = vaddq_s16(*q12s16, *q14s16);
|
||||
*q12s16 = vsubq_s16(*q12s16, *q14s16);
|
||||
|
||||
q14s32 = vaddq_s32(q5s32, q1s32);
|
||||
q15s32 = vaddq_s32(q6s32, q3s32);
|
||||
q5s32 = vsubq_s32(q5s32, q1s32);
|
||||
q6s32 = vsubq_s32(q6s32, q3s32);
|
||||
|
||||
d18s16 = vqrshrn_n_s32(q14s32, 14);
|
||||
d19s16 = vqrshrn_n_s32(q15s32, 14);
|
||||
d10s16 = vqrshrn_n_s32(q5s32, 14);
|
||||
d11s16 = vqrshrn_n_s32(q6s32, 14);
|
||||
*q9s16 = vcombine_s16(d18s16, d19s16);
|
||||
|
||||
q1s32 = vaddq_s32(q7s32, q10s32);
|
||||
q3s32 = vaddq_s32(q0s32, q2s32);
|
||||
q7s32 = vsubq_s32(q7s32, q10s32);
|
||||
q0s32 = vsubq_s32(q0s32, q2s32);
|
||||
|
||||
d28s16 = vqrshrn_n_s32(q1s32, 14);
|
||||
d29s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d14s16 = vqrshrn_n_s32(q7s32, 14);
|
||||
d15s16 = vqrshrn_n_s32(q0s32, 14);
|
||||
*q14s16 = vcombine_s16(d28s16, d29s16);
|
||||
|
||||
d30s16 = vdup_n_s16((int16_t)cospi_16_64);
|
||||
|
||||
d22s16 = vget_low_s16(*q11s16);
|
||||
d23s16 = vget_high_s16(*q11s16);
|
||||
q2s32 = vmull_s16(d22s16, d30s16);
|
||||
q3s32 = vmull_s16(d23s16, d30s16);
|
||||
q13s32 = vmull_s16(d22s16, d30s16);
|
||||
q1s32 = vmull_s16(d23s16, d30s16);
|
||||
|
||||
d24s16 = vget_low_s16(*q12s16);
|
||||
d25s16 = vget_high_s16(*q12s16);
|
||||
q2s32 = vmlal_s16(q2s32, d24s16, d30s16);
|
||||
q3s32 = vmlal_s16(q3s32, d25s16, d30s16);
|
||||
q13s32 = vmlsl_s16(q13s32, d24s16, d30s16);
|
||||
q1s32 = vmlsl_s16(q1s32, d25s16, d30s16);
|
||||
|
||||
d4s16 = vqrshrn_n_s32(q2s32, 14);
|
||||
d5s16 = vqrshrn_n_s32(q3s32, 14);
|
||||
d24s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
d25s16 = vqrshrn_n_s32(q1s32, 14);
|
||||
q2s16 = vcombine_s16(d4s16, d5s16);
|
||||
*q12s16 = vcombine_s16(d24s16, d25s16);
|
||||
|
||||
q13s32 = vmull_s16(d10s16, d30s16);
|
||||
q1s32 = vmull_s16(d11s16, d30s16);
|
||||
q11s32 = vmull_s16(d10s16, d30s16);
|
||||
q0s32 = vmull_s16(d11s16, d30s16);
|
||||
|
||||
q13s32 = vmlal_s16(q13s32, d14s16, d30s16);
|
||||
q1s32 = vmlal_s16(q1s32, d15s16, d30s16);
|
||||
q11s32 = vmlsl_s16(q11s32, d14s16, d30s16);
|
||||
q0s32 = vmlsl_s16(q0s32, d15s16, d30s16);
|
||||
|
||||
d20s16 = vqrshrn_n_s32(q13s32, 14);
|
||||
d21s16 = vqrshrn_n_s32(q1s32, 14);
|
||||
d12s16 = vqrshrn_n_s32(q11s32, 14);
|
||||
d13s16 = vqrshrn_n_s32(q0s32, 14);
|
||||
*q10s16 = vcombine_s16(d20s16, d21s16);
|
||||
q6s16 = vcombine_s16(d12s16, d13s16);
|
||||
|
||||
q5s16 = vdupq_n_s16(0);
|
||||
|
||||
*q9s16 = vsubq_s16(q5s16, *q9s16);
|
||||
*q11s16 = vsubq_s16(q5s16, q2s16);
|
||||
*q13s16 = vsubq_s16(q5s16, q6s16);
|
||||
*q15s16 = vsubq_s16(q5s16, q4s16);
|
||||
return;
|
||||
}
|
||||
|
||||
void av1_iht8x8_64_add_neon(const tran_low_t *input, uint8_t *dest,
|
||||
int dest_stride, const TxfmParam *txfm_param) {
|
||||
int i;
|
||||
uint8_t *d1, *d2;
|
||||
uint8x8_t d0u8, d1u8, d2u8, d3u8;
|
||||
uint64x1_t d0u64, d1u64, d2u64, d3u64;
|
||||
int16x8_t q8s16, q9s16, q10s16, q11s16, q12s16, q13s16, q14s16, q15s16;
|
||||
uint16x8_t q8u16, q9u16, q10u16, q11u16;
|
||||
|
||||
q8s16 = vld1q_s16(input);
|
||||
q9s16 = vld1q_s16(input + 8);
|
||||
q10s16 = vld1q_s16(input + 8 * 2);
|
||||
q11s16 = vld1q_s16(input + 8 * 3);
|
||||
q12s16 = vld1q_s16(input + 8 * 4);
|
||||
q13s16 = vld1q_s16(input + 8 * 5);
|
||||
q14s16 = vld1q_s16(input + 8 * 6);
|
||||
q15s16 = vld1q_s16(input + 8 * 7);
|
||||
|
||||
TRANSPOSE8X8(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
const TX_TYPE tx_type = txfm_param->tx_type;
|
||||
switch (tx_type) {
|
||||
case DCT_DCT: // idct_idct is not supported. Fall back to C
|
||||
av1_iht8x8_64_add_c(input, dest, dest_stride, txfm_param);
|
||||
return;
|
||||
break;
|
||||
case ADST_DCT: // iadst_idct
|
||||
// generate IDCT constants
|
||||
// GENERATE_IDCT_CONSTANTS
|
||||
|
||||
// first transform rows
|
||||
IDCT8x8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE8X8(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// generate IADST constants
|
||||
// GENERATE_IADST_CONSTANTS
|
||||
|
||||
// then transform columns
|
||||
IADST8X8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
break;
|
||||
case DCT_ADST: // idct_iadst
|
||||
// generate IADST constants
|
||||
// GENERATE_IADST_CONSTANTS
|
||||
|
||||
// first transform rows
|
||||
IADST8X8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE8X8(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// generate IDCT constants
|
||||
// GENERATE_IDCT_CONSTANTS
|
||||
|
||||
// then transform columns
|
||||
IDCT8x8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
break;
|
||||
case ADST_ADST: // iadst_iadst
|
||||
// generate IADST constants
|
||||
// GENERATE_IADST_CONSTANTS
|
||||
|
||||
// first transform rows
|
||||
IADST8X8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// transpose the matrix
|
||||
TRANSPOSE8X8(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
|
||||
// then transform columns
|
||||
IADST8X8_1D(&q8s16, &q9s16, &q10s16, &q11s16, &q12s16, &q13s16, &q14s16,
|
||||
&q15s16);
|
||||
break;
|
||||
default: // iadst_idct
|
||||
assert(0);
|
||||
break;
|
||||
}
|
||||
|
||||
q8s16 = vrshrq_n_s16(q8s16, 5);
|
||||
q9s16 = vrshrq_n_s16(q9s16, 5);
|
||||
q10s16 = vrshrq_n_s16(q10s16, 5);
|
||||
q11s16 = vrshrq_n_s16(q11s16, 5);
|
||||
q12s16 = vrshrq_n_s16(q12s16, 5);
|
||||
q13s16 = vrshrq_n_s16(q13s16, 5);
|
||||
q14s16 = vrshrq_n_s16(q14s16, 5);
|
||||
q15s16 = vrshrq_n_s16(q15s16, 5);
|
||||
|
||||
for (d1 = d2 = dest, i = 0; i < 2; i++) {
|
||||
if (i != 0) {
|
||||
q8s16 = q12s16;
|
||||
q9s16 = q13s16;
|
||||
q10s16 = q14s16;
|
||||
q11s16 = q15s16;
|
||||
}
|
||||
|
||||
d0u64 = vld1_u64((uint64_t *)d1);
|
||||
d1 += dest_stride;
|
||||
d1u64 = vld1_u64((uint64_t *)d1);
|
||||
d1 += dest_stride;
|
||||
d2u64 = vld1_u64((uint64_t *)d1);
|
||||
d1 += dest_stride;
|
||||
d3u64 = vld1_u64((uint64_t *)d1);
|
||||
d1 += dest_stride;
|
||||
|
||||
q8u16 = vaddw_u8(vreinterpretq_u16_s16(q8s16), vreinterpret_u8_u64(d0u64));
|
||||
q9u16 = vaddw_u8(vreinterpretq_u16_s16(q9s16), vreinterpret_u8_u64(d1u64));
|
||||
q10u16 =
|
||||
vaddw_u8(vreinterpretq_u16_s16(q10s16), vreinterpret_u8_u64(d2u64));
|
||||
q11u16 =
|
||||
vaddw_u8(vreinterpretq_u16_s16(q11s16), vreinterpret_u8_u64(d3u64));
|
||||
|
||||
d0u8 = vqmovun_s16(vreinterpretq_s16_u16(q8u16));
|
||||
d1u8 = vqmovun_s16(vreinterpretq_s16_u16(q9u16));
|
||||
d2u8 = vqmovun_s16(vreinterpretq_s16_u16(q10u16));
|
||||
d3u8 = vqmovun_s16(vreinterpretq_s16_u16(q11u16));
|
||||
|
||||
vst1_u64((uint64_t *)d2, vreinterpret_u64_u8(d0u8));
|
||||
d2 += dest_stride;
|
||||
vst1_u64((uint64_t *)d2, vreinterpret_u64_u8(d1u8));
|
||||
d2 += dest_stride;
|
||||
vst1_u64((uint64_t *)d2, vreinterpret_u64_u8(d2u8));
|
||||
d2 += dest_stride;
|
||||
vst1_u64((uint64_t *)d2, vreinterpret_u64_u8(d3u8));
|
||||
d2 += dest_stride;
|
||||
}
|
||||
return;
|
||||
}
|
||||
86
third_party/aom/av1/common/arm/reconinter_neon.c
vendored
Normal file
86
third_party/aom/av1/common/arm/reconinter_neon.c
vendored
Normal file
|
|
@ -0,0 +1,86 @@
|
|||
/*
|
||||
*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
||||
|
||||
#include <arm_neon.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "aom/aom_integer.h"
|
||||
#include "aom_dsp/blend.h"
|
||||
#include "aom_ports/mem.h"
|
||||
#include "av1/common/arm/mem_neon.h"
|
||||
#include "av1/common/blockd.h"
|
||||
#include "config/av1_rtcd.h"
|
||||
|
||||
void av1_build_compound_diffwtd_mask_d16_neon(
|
||||
uint8_t *mask, DIFFWTD_MASK_TYPE mask_type, const CONV_BUF_TYPE *src0,
|
||||
int src0_stride, const CONV_BUF_TYPE *src1, int src1_stride, int h, int w,
|
||||
ConvolveParams *conv_params, int bd) {
|
||||
assert(h >= 4);
|
||||
assert(w >= 4);
|
||||
assert((mask_type == DIFFWTD_38_INV) || (mask_type == DIFFWTD_38));
|
||||
const int round =
|
||||
2 * FILTER_BITS - conv_params->round_0 - conv_params->round_1 + (bd - 8);
|
||||
uint16x8_t diff_q, tmp0, tmp1;
|
||||
uint8x8_t diff_d, diff_select;
|
||||
const CONV_BUF_TYPE *src0_1, *src1_1;
|
||||
const int16x8_t dup_round = vdupq_n_s16((int16_t)(-round));
|
||||
const uint8x8_t dup_38 = vdup_n_u8(38);
|
||||
const uint8x8_t dup_64 = vdup_n_u8(AOM_BLEND_A64_MAX_ALPHA);
|
||||
if (mask_type == DIFFWTD_38) {
|
||||
diff_select = vdup_n_u8(255);
|
||||
} else {
|
||||
diff_select = vdup_n_u8(0);
|
||||
}
|
||||
if (w >= 8) {
|
||||
for (int i = 0; i < h; ++i) {
|
||||
src0_1 = src0;
|
||||
src1_1 = src1;
|
||||
for (int j = 0; j < w; j += 8) {
|
||||
__builtin_prefetch(src0_1);
|
||||
__builtin_prefetch(src1_1);
|
||||
diff_q = vabdq_u16(vld1q_u16(src0_1), vld1q_u16(src1_1));
|
||||
diff_q = vrshlq_u16(diff_q, dup_round);
|
||||
diff_d = vshrn_n_u16(diff_q, DIFF_FACTOR_LOG2);
|
||||
diff_d = vmin_u8(vadd_u8(diff_d, dup_38), dup_64);
|
||||
diff_d = vbsl_u8(diff_select, diff_d, vsub_u8(dup_64, diff_d));
|
||||
vst1_u8(mask, diff_d);
|
||||
src0_1 += 8;
|
||||
src1_1 += 8;
|
||||
mask += 8;
|
||||
}
|
||||
src0 += src0_stride;
|
||||
src1 += src1_stride;
|
||||
}
|
||||
} else if (w == 4) {
|
||||
for (int i = 0; i < h; i += 2) {
|
||||
src0_1 = src0;
|
||||
src1_1 = src1;
|
||||
__builtin_prefetch(src0_1 + 0 * src0_stride);
|
||||
__builtin_prefetch(src0_1 + 1 * src0_stride);
|
||||
__builtin_prefetch(src1_1 + 0 * src1_stride);
|
||||
__builtin_prefetch(src1_1 + 1 * src1_stride);
|
||||
tmp0 = vcombine_u16(vld1_u16(src0_1 + (0 * src0_stride)),
|
||||
vld1_u16(src0_1 + (1 * src0_stride)));
|
||||
tmp1 = vcombine_u16(vld1_u16(src1_1 + (0 * src1_stride)),
|
||||
vld1_u16(src1_1 + (1 * src1_stride)));
|
||||
diff_q = vabdq_u16(tmp0, tmp1);
|
||||
diff_q = vrshlq_u16(diff_q, dup_round);
|
||||
diff_d = vshrn_n_u16(diff_q, DIFF_FACTOR_LOG2);
|
||||
diff_d = vmin_u8(vadd_u8(diff_d, dup_38), dup_64);
|
||||
diff_d = vbsl_u8(diff_select, diff_d, vsub_u8(dup_64, diff_d));
|
||||
vst1_u8(mask, diff_d);
|
||||
src0 += src0_stride * 2;
|
||||
src1 += src1_stride * 2;
|
||||
mask += w * 2;
|
||||
}
|
||||
}
|
||||
}
|
||||
422
third_party/aom/av1/common/arm/transpose_neon.h
vendored
Normal file
422
third_party/aom/av1/common/arm/transpose_neon.h
vendored
Normal file
|
|
@ -0,0 +1,422 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All Rights Reserved.
|
||||
*
|
||||
* Use of this source code is governed by a BSD-style license
|
||||
* that can be found in the LICENSE file in the root of the source
|
||||
* tree. An additional intellectual property rights grant can be found
|
||||
* in the file PATENTS. All contributing project authors may
|
||||
* be found in the AUTHORS file in the root of the source tree.
|
||||
*/
|
||||
|
||||
#ifndef AV1_COMMON_ARM_TRANSPOSE_NEON_H_
|
||||
#define AV1_COMMON_ARM_TRANSPOSE_NEON_H_
|
||||
|
||||
#include <arm_neon.h>
|
||||
|
||||
static INLINE void transpose_u8_8x8(uint8x8_t *a0, uint8x8_t *a1, uint8x8_t *a2,
|
||||
uint8x8_t *a3, uint8x8_t *a4, uint8x8_t *a5,
|
||||
uint8x8_t *a6, uint8x8_t *a7) {
|
||||
// Swap 8 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 04 05 06 07
|
||||
// a1: 10 11 12 13 14 15 16 17
|
||||
// a2: 20 21 22 23 24 25 26 27
|
||||
// a3: 30 31 32 33 34 35 36 37
|
||||
// a4: 40 41 42 43 44 45 46 47
|
||||
// a5: 50 51 52 53 54 55 56 57
|
||||
// a6: 60 61 62 63 64 65 66 67
|
||||
// a7: 70 71 72 73 74 75 76 77
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12 04 14 06 16 40 50 42 52 44 54 46 56
|
||||
// b0.val[1]: 01 11 03 13 05 15 07 17 41 51 43 53 45 55 47 57
|
||||
// b1.val[0]: 20 30 22 32 24 34 26 36 60 70 62 72 64 74 66 76
|
||||
// b1.val[1]: 21 31 23 33 25 35 27 37 61 71 63 73 65 75 67 77
|
||||
|
||||
const uint8x16x2_t b0 =
|
||||
vtrnq_u8(vcombine_u8(*a0, *a4), vcombine_u8(*a1, *a5));
|
||||
const uint8x16x2_t b1 =
|
||||
vtrnq_u8(vcombine_u8(*a2, *a6), vcombine_u8(*a3, *a7));
|
||||
|
||||
// Swap 16 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30 04 14 24 34 40 50 60 70 44 54 64 74
|
||||
// c0.val[1]: 02 12 22 32 06 16 26 36 42 52 62 72 46 56 66 76
|
||||
// c1.val[0]: 01 11 21 31 05 15 25 35 41 51 61 71 45 55 65 75
|
||||
// c1.val[1]: 03 13 23 33 07 17 27 37 43 53 63 73 47 57 67 77
|
||||
|
||||
const uint16x8x2_t c0 = vtrnq_u16(vreinterpretq_u16_u8(b0.val[0]),
|
||||
vreinterpretq_u16_u8(b1.val[0]));
|
||||
const uint16x8x2_t c1 = vtrnq_u16(vreinterpretq_u16_u8(b0.val[1]),
|
||||
vreinterpretq_u16_u8(b1.val[1]));
|
||||
|
||||
// Unzip 32 bit elements resulting in:
|
||||
// d0.val[0]: 00 10 20 30 40 50 60 70 01 11 21 31 41 51 61 71
|
||||
// d0.val[1]: 04 14 24 34 44 54 64 74 05 15 25 35 45 55 65 75
|
||||
// d1.val[0]: 02 12 22 32 42 52 62 72 03 13 23 33 43 53 63 73
|
||||
// d1.val[1]: 06 16 26 36 46 56 66 76 07 17 27 37 47 57 67 77
|
||||
const uint32x4x2_t d0 = vuzpq_u32(vreinterpretq_u32_u16(c0.val[0]),
|
||||
vreinterpretq_u32_u16(c1.val[0]));
|
||||
const uint32x4x2_t d1 = vuzpq_u32(vreinterpretq_u32_u16(c0.val[1]),
|
||||
vreinterpretq_u32_u16(c1.val[1]));
|
||||
|
||||
*a0 = vreinterpret_u8_u32(vget_low_u32(d0.val[0]));
|
||||
*a1 = vreinterpret_u8_u32(vget_high_u32(d0.val[0]));
|
||||
*a2 = vreinterpret_u8_u32(vget_low_u32(d1.val[0]));
|
||||
*a3 = vreinterpret_u8_u32(vget_high_u32(d1.val[0]));
|
||||
*a4 = vreinterpret_u8_u32(vget_low_u32(d0.val[1]));
|
||||
*a5 = vreinterpret_u8_u32(vget_high_u32(d0.val[1]));
|
||||
*a6 = vreinterpret_u8_u32(vget_low_u32(d1.val[1]));
|
||||
*a7 = vreinterpret_u8_u32(vget_high_u32(d1.val[1]));
|
||||
}
|
||||
|
||||
static INLINE void transpose_u8_8x4(uint8x8_t *a0, uint8x8_t *a1, uint8x8_t *a2,
|
||||
uint8x8_t *a3) {
|
||||
// Swap 8 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 04 05 06 07
|
||||
// a1: 10 11 12 13 14 15 16 17
|
||||
// a2: 20 21 22 23 24 25 26 27
|
||||
// a3: 30 31 32 33 34 35 36 37
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12 04 14 06 16
|
||||
// b0.val[1]: 01 11 03 13 05 15 07 17
|
||||
// b1.val[0]: 20 30 22 32 24 34 26 36
|
||||
// b1.val[1]: 21 31 23 33 25 35 27 37
|
||||
|
||||
const uint8x8x2_t b0 = vtrn_u8(*a0, *a1);
|
||||
const uint8x8x2_t b1 = vtrn_u8(*a2, *a3);
|
||||
|
||||
// Swap 16 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30 04 14 24 34
|
||||
// c0.val[1]: 02 12 22 32 06 16 26 36
|
||||
// c1.val[0]: 01 11 21 31 05 15 25 35
|
||||
// c1.val[1]: 03 13 23 33 07 17 27 37
|
||||
|
||||
const uint16x4x2_t c0 =
|
||||
vtrn_u16(vreinterpret_u16_u8(b0.val[0]), vreinterpret_u16_u8(b1.val[0]));
|
||||
const uint16x4x2_t c1 =
|
||||
vtrn_u16(vreinterpret_u16_u8(b0.val[1]), vreinterpret_u16_u8(b1.val[1]));
|
||||
|
||||
*a0 = vreinterpret_u8_u16(c0.val[0]);
|
||||
*a1 = vreinterpret_u8_u16(c1.val[0]);
|
||||
*a2 = vreinterpret_u8_u16(c0.val[1]);
|
||||
*a3 = vreinterpret_u8_u16(c1.val[1]);
|
||||
}
|
||||
|
||||
static INLINE void transpose_u8_4x4(uint8x8_t *a0, uint8x8_t *a1) {
|
||||
// Swap 16 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 10 11 12 13
|
||||
// a1: 20 21 22 23 30 31 32 33
|
||||
// to:
|
||||
// b0.val[0]: 00 01 20 21 10 11 30 31
|
||||
// b0.val[1]: 02 03 22 23 12 13 32 33
|
||||
|
||||
const uint16x4x2_t b0 =
|
||||
vtrn_u16(vreinterpret_u16_u8(*a0), vreinterpret_u16_u8(*a1));
|
||||
|
||||
// Swap 32 bit elements resulting in:
|
||||
// c0.val[0]: 00 01 20 21 02 03 22 23
|
||||
// c0.val[1]: 10 11 30 31 12 13 32 33
|
||||
|
||||
const uint32x2x2_t c0 = vtrn_u32(vreinterpret_u32_u16(b0.val[0]),
|
||||
vreinterpret_u32_u16(b0.val[1]));
|
||||
|
||||
// Swap 8 bit elements resulting in:
|
||||
// d0.val[0]: 00 10 20 30 02 12 22 32
|
||||
// d0.val[1]: 01 11 21 31 03 13 23 33
|
||||
|
||||
const uint8x8x2_t d0 =
|
||||
vtrn_u8(vreinterpret_u8_u32(c0.val[0]), vreinterpret_u8_u32(c0.val[1]));
|
||||
|
||||
*a0 = d0.val[0];
|
||||
*a1 = d0.val[1];
|
||||
}
|
||||
|
||||
static INLINE void transpose_u8_4x8(uint8x8_t *a0, uint8x8_t *a1, uint8x8_t *a2,
|
||||
uint8x8_t *a3, const uint8x8_t a4,
|
||||
const uint8x8_t a5, const uint8x8_t a6,
|
||||
const uint8x8_t a7) {
|
||||
// Swap 32 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 XX XX XX XX
|
||||
// a1: 10 11 12 13 XX XX XX XX
|
||||
// a2: 20 21 22 23 XX XX XX XX
|
||||
// a3; 30 31 32 33 XX XX XX XX
|
||||
// a4: 40 41 42 43 XX XX XX XX
|
||||
// a5: 50 51 52 53 XX XX XX XX
|
||||
// a6: 60 61 62 63 XX XX XX XX
|
||||
// a7: 70 71 72 73 XX XX XX XX
|
||||
// to:
|
||||
// b0.val[0]: 00 01 02 03 40 41 42 43
|
||||
// b1.val[0]: 10 11 12 13 50 51 52 53
|
||||
// b2.val[0]: 20 21 22 23 60 61 62 63
|
||||
// b3.val[0]: 30 31 32 33 70 71 72 73
|
||||
|
||||
const uint32x2x2_t b0 =
|
||||
vtrn_u32(vreinterpret_u32_u8(*a0), vreinterpret_u32_u8(a4));
|
||||
const uint32x2x2_t b1 =
|
||||
vtrn_u32(vreinterpret_u32_u8(*a1), vreinterpret_u32_u8(a5));
|
||||
const uint32x2x2_t b2 =
|
||||
vtrn_u32(vreinterpret_u32_u8(*a2), vreinterpret_u32_u8(a6));
|
||||
const uint32x2x2_t b3 =
|
||||
vtrn_u32(vreinterpret_u32_u8(*a3), vreinterpret_u32_u8(a7));
|
||||
|
||||
// Swap 16 bit elements resulting in:
|
||||
// c0.val[0]: 00 01 20 21 40 41 60 61
|
||||
// c0.val[1]: 02 03 22 23 42 43 62 63
|
||||
// c1.val[0]: 10 11 30 31 50 51 70 71
|
||||
// c1.val[1]: 12 13 32 33 52 53 72 73
|
||||
|
||||
const uint16x4x2_t c0 = vtrn_u16(vreinterpret_u16_u32(b0.val[0]),
|
||||
vreinterpret_u16_u32(b2.val[0]));
|
||||
const uint16x4x2_t c1 = vtrn_u16(vreinterpret_u16_u32(b1.val[0]),
|
||||
vreinterpret_u16_u32(b3.val[0]));
|
||||
|
||||
// Swap 8 bit elements resulting in:
|
||||
// d0.val[0]: 00 10 20 30 40 50 60 70
|
||||
// d0.val[1]: 01 11 21 31 41 51 61 71
|
||||
// d1.val[0]: 02 12 22 32 42 52 62 72
|
||||
// d1.val[1]: 03 13 23 33 43 53 63 73
|
||||
|
||||
const uint8x8x2_t d0 =
|
||||
vtrn_u8(vreinterpret_u8_u16(c0.val[0]), vreinterpret_u8_u16(c1.val[0]));
|
||||
const uint8x8x2_t d1 =
|
||||
vtrn_u8(vreinterpret_u8_u16(c0.val[1]), vreinterpret_u8_u16(c1.val[1]));
|
||||
|
||||
*a0 = d0.val[0];
|
||||
*a1 = d0.val[1];
|
||||
*a2 = d1.val[0];
|
||||
*a3 = d1.val[1];
|
||||
}
|
||||
|
||||
static INLINE void transpose_u16_4x8(uint16x4_t *a0, uint16x4_t *a1,
|
||||
uint16x4_t *a2, uint16x4_t *a3,
|
||||
uint16x4_t *a4, uint16x4_t *a5,
|
||||
uint16x4_t *a6, uint16x4_t *a7,
|
||||
uint16x8_t *o0, uint16x8_t *o1,
|
||||
uint16x8_t *o2, uint16x8_t *o3) {
|
||||
// Swap 16 bit elements. Goes from:
|
||||
// a0: 00 01 02 03
|
||||
// a1: 10 11 12 13
|
||||
// a2: 20 21 22 23
|
||||
// a3: 30 31 32 33
|
||||
// a4: 40 41 42 43
|
||||
// a5: 50 51 52 53
|
||||
// a6: 60 61 62 63
|
||||
// a7: 70 71 72 73
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12
|
||||
// b0.val[1]: 01 11 03 13
|
||||
// b1.val[0]: 20 30 22 32
|
||||
// b1.val[1]: 21 31 23 33
|
||||
// b2.val[0]: 40 50 42 52
|
||||
// b2.val[1]: 41 51 43 53
|
||||
// b3.val[0]: 60 70 62 72
|
||||
// b3.val[1]: 61 71 63 73
|
||||
|
||||
uint16x4x2_t b0 = vtrn_u16(*a0, *a1);
|
||||
uint16x4x2_t b1 = vtrn_u16(*a2, *a3);
|
||||
uint16x4x2_t b2 = vtrn_u16(*a4, *a5);
|
||||
uint16x4x2_t b3 = vtrn_u16(*a6, *a7);
|
||||
|
||||
// Swap 32 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30
|
||||
// c0.val[1]: 02 12 22 32
|
||||
// c1.val[0]: 01 11 21 31
|
||||
// c1.val[1]: 03 13 23 33
|
||||
// c2.val[0]: 40 50 60 70
|
||||
// c2.val[1]: 42 52 62 72
|
||||
// c3.val[0]: 41 51 61 71
|
||||
// c3.val[1]: 43 53 63 73
|
||||
|
||||
uint32x2x2_t c0 = vtrn_u32(vreinterpret_u32_u16(b0.val[0]),
|
||||
vreinterpret_u32_u16(b1.val[0]));
|
||||
uint32x2x2_t c1 = vtrn_u32(vreinterpret_u32_u16(b0.val[1]),
|
||||
vreinterpret_u32_u16(b1.val[1]));
|
||||
uint32x2x2_t c2 = vtrn_u32(vreinterpret_u32_u16(b2.val[0]),
|
||||
vreinterpret_u32_u16(b3.val[0]));
|
||||
uint32x2x2_t c3 = vtrn_u32(vreinterpret_u32_u16(b2.val[1]),
|
||||
vreinterpret_u32_u16(b3.val[1]));
|
||||
|
||||
// Swap 64 bit elements resulting in:
|
||||
// o0: 00 10 20 30 40 50 60 70
|
||||
// o1: 01 11 21 31 41 51 61 71
|
||||
// o2: 02 12 22 32 42 52 62 72
|
||||
// o3: 03 13 23 33 43 53 63 73
|
||||
|
||||
*o0 = vcombine_u16(vreinterpret_u16_u32(c0.val[0]),
|
||||
vreinterpret_u16_u32(c2.val[0]));
|
||||
*o1 = vcombine_u16(vreinterpret_u16_u32(c1.val[0]),
|
||||
vreinterpret_u16_u32(c3.val[0]));
|
||||
*o2 = vcombine_u16(vreinterpret_u16_u32(c0.val[1]),
|
||||
vreinterpret_u16_u32(c2.val[1]));
|
||||
*o3 = vcombine_u16(vreinterpret_u16_u32(c1.val[1]),
|
||||
vreinterpret_u16_u32(c3.val[1]));
|
||||
}
|
||||
|
||||
static INLINE void transpose_u16_8x8(uint16x8_t *a0, uint16x8_t *a1,
|
||||
uint16x8_t *a2, uint16x8_t *a3,
|
||||
uint16x8_t *a4, uint16x8_t *a5,
|
||||
uint16x8_t *a6, uint16x8_t *a7) {
|
||||
// Swap 16 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 04 05 06 07
|
||||
// a1: 10 11 12 13 14 15 16 17
|
||||
// a2: 20 21 22 23 24 25 26 27
|
||||
// a3: 30 31 32 33 34 35 36 37
|
||||
// a4: 40 41 42 43 44 45 46 47
|
||||
// a5: 50 51 52 53 54 55 56 57
|
||||
// a6: 60 61 62 63 64 65 66 67
|
||||
// a7: 70 71 72 73 74 75 76 77
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12 04 14 06 16
|
||||
// b0.val[1]: 01 11 03 13 05 15 07 17
|
||||
// b1.val[0]: 20 30 22 32 24 34 26 36
|
||||
// b1.val[1]: 21 31 23 33 25 35 27 37
|
||||
// b2.val[0]: 40 50 42 52 44 54 46 56
|
||||
// b2.val[1]: 41 51 43 53 45 55 47 57
|
||||
// b3.val[0]: 60 70 62 72 64 74 66 76
|
||||
// b3.val[1]: 61 71 63 73 65 75 67 77
|
||||
|
||||
const uint16x8x2_t b0 = vtrnq_u16(*a0, *a1);
|
||||
const uint16x8x2_t b1 = vtrnq_u16(*a2, *a3);
|
||||
const uint16x8x2_t b2 = vtrnq_u16(*a4, *a5);
|
||||
const uint16x8x2_t b3 = vtrnq_u16(*a6, *a7);
|
||||
|
||||
// Swap 32 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30 04 14 24 34
|
||||
// c0.val[1]: 02 12 22 32 06 16 26 36
|
||||
// c1.val[0]: 01 11 21 31 05 15 25 35
|
||||
// c1.val[1]: 03 13 23 33 07 17 27 37
|
||||
// c2.val[0]: 40 50 60 70 44 54 64 74
|
||||
// c2.val[1]: 42 52 62 72 46 56 66 76
|
||||
// c3.val[0]: 41 51 61 71 45 55 65 75
|
||||
// c3.val[1]: 43 53 63 73 47 57 67 77
|
||||
|
||||
const uint32x4x2_t c0 = vtrnq_u32(vreinterpretq_u32_u16(b0.val[0]),
|
||||
vreinterpretq_u32_u16(b1.val[0]));
|
||||
const uint32x4x2_t c1 = vtrnq_u32(vreinterpretq_u32_u16(b0.val[1]),
|
||||
vreinterpretq_u32_u16(b1.val[1]));
|
||||
const uint32x4x2_t c2 = vtrnq_u32(vreinterpretq_u32_u16(b2.val[0]),
|
||||
vreinterpretq_u32_u16(b3.val[0]));
|
||||
const uint32x4x2_t c3 = vtrnq_u32(vreinterpretq_u32_u16(b2.val[1]),
|
||||
vreinterpretq_u32_u16(b3.val[1]));
|
||||
|
||||
*a0 = vcombine_u16(vget_low_u16(vreinterpretq_u16_u32(c0.val[0])),
|
||||
vget_low_u16(vreinterpretq_u16_u32(c2.val[0])));
|
||||
*a4 = vcombine_u16(vget_high_u16(vreinterpretq_u16_u32(c0.val[0])),
|
||||
vget_high_u16(vreinterpretq_u16_u32(c2.val[0])));
|
||||
|
||||
*a2 = vcombine_u16(vget_low_u16(vreinterpretq_u16_u32(c0.val[1])),
|
||||
vget_low_u16(vreinterpretq_u16_u32(c2.val[1])));
|
||||
*a6 = vcombine_u16(vget_high_u16(vreinterpretq_u16_u32(c0.val[1])),
|
||||
vget_high_u16(vreinterpretq_u16_u32(c2.val[1])));
|
||||
|
||||
*a1 = vcombine_u16(vget_low_u16(vreinterpretq_u16_u32(c1.val[0])),
|
||||
vget_low_u16(vreinterpretq_u16_u32(c3.val[0])));
|
||||
*a5 = vcombine_u16(vget_high_u16(vreinterpretq_u16_u32(c1.val[0])),
|
||||
vget_high_u16(vreinterpretq_u16_u32(c3.val[0])));
|
||||
|
||||
*a3 = vcombine_u16(vget_low_u16(vreinterpretq_u16_u32(c1.val[1])),
|
||||
vget_low_u16(vreinterpretq_u16_u32(c3.val[1])));
|
||||
*a7 = vcombine_u16(vget_high_u16(vreinterpretq_u16_u32(c1.val[1])),
|
||||
vget_high_u16(vreinterpretq_u16_u32(c3.val[1])));
|
||||
}
|
||||
|
||||
static INLINE void transpose_s16_8x8(int16x8_t *a0, int16x8_t *a1,
|
||||
int16x8_t *a2, int16x8_t *a3,
|
||||
int16x8_t *a4, int16x8_t *a5,
|
||||
int16x8_t *a6, int16x8_t *a7) {
|
||||
// Swap 16 bit elements. Goes from:
|
||||
// a0: 00 01 02 03 04 05 06 07
|
||||
// a1: 10 11 12 13 14 15 16 17
|
||||
// a2: 20 21 22 23 24 25 26 27
|
||||
// a3: 30 31 32 33 34 35 36 37
|
||||
// a4: 40 41 42 43 44 45 46 47
|
||||
// a5: 50 51 52 53 54 55 56 57
|
||||
// a6: 60 61 62 63 64 65 66 67
|
||||
// a7: 70 71 72 73 74 75 76 77
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12 04 14 06 16
|
||||
// b0.val[1]: 01 11 03 13 05 15 07 17
|
||||
// b1.val[0]: 20 30 22 32 24 34 26 36
|
||||
// b1.val[1]: 21 31 23 33 25 35 27 37
|
||||
// b2.val[0]: 40 50 42 52 44 54 46 56
|
||||
// b2.val[1]: 41 51 43 53 45 55 47 57
|
||||
// b3.val[0]: 60 70 62 72 64 74 66 76
|
||||
// b3.val[1]: 61 71 63 73 65 75 67 77
|
||||
|
||||
const int16x8x2_t b0 = vtrnq_s16(*a0, *a1);
|
||||
const int16x8x2_t b1 = vtrnq_s16(*a2, *a3);
|
||||
const int16x8x2_t b2 = vtrnq_s16(*a4, *a5);
|
||||
const int16x8x2_t b3 = vtrnq_s16(*a6, *a7);
|
||||
|
||||
// Swap 32 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30 04 14 24 34
|
||||
// c0.val[1]: 02 12 22 32 06 16 26 36
|
||||
// c1.val[0]: 01 11 21 31 05 15 25 35
|
||||
// c1.val[1]: 03 13 23 33 07 17 27 37
|
||||
// c2.val[0]: 40 50 60 70 44 54 64 74
|
||||
// c2.val[1]: 42 52 62 72 46 56 66 76
|
||||
// c3.val[0]: 41 51 61 71 45 55 65 75
|
||||
// c3.val[1]: 43 53 63 73 47 57 67 77
|
||||
|
||||
const int32x4x2_t c0 = vtrnq_s32(vreinterpretq_s32_s16(b0.val[0]),
|
||||
vreinterpretq_s32_s16(b1.val[0]));
|
||||
const int32x4x2_t c1 = vtrnq_s32(vreinterpretq_s32_s16(b0.val[1]),
|
||||
vreinterpretq_s32_s16(b1.val[1]));
|
||||
const int32x4x2_t c2 = vtrnq_s32(vreinterpretq_s32_s16(b2.val[0]),
|
||||
vreinterpretq_s32_s16(b3.val[0]));
|
||||
const int32x4x2_t c3 = vtrnq_s32(vreinterpretq_s32_s16(b2.val[1]),
|
||||
vreinterpretq_s32_s16(b3.val[1]));
|
||||
|
||||
*a0 = vcombine_s16(vget_low_s16(vreinterpretq_s16_s32(c0.val[0])),
|
||||
vget_low_s16(vreinterpretq_s16_s32(c2.val[0])));
|
||||
*a4 = vcombine_s16(vget_high_s16(vreinterpretq_s16_s32(c0.val[0])),
|
||||
vget_high_s16(vreinterpretq_s16_s32(c2.val[0])));
|
||||
|
||||
*a2 = vcombine_s16(vget_low_s16(vreinterpretq_s16_s32(c0.val[1])),
|
||||
vget_low_s16(vreinterpretq_s16_s32(c2.val[1])));
|
||||
*a6 = vcombine_s16(vget_high_s16(vreinterpretq_s16_s32(c0.val[1])),
|
||||
vget_high_s16(vreinterpretq_s16_s32(c2.val[1])));
|
||||
|
||||
*a1 = vcombine_s16(vget_low_s16(vreinterpretq_s16_s32(c1.val[0])),
|
||||
vget_low_s16(vreinterpretq_s16_s32(c3.val[0])));
|
||||
*a5 = vcombine_s16(vget_high_s16(vreinterpretq_s16_s32(c1.val[0])),
|
||||
vget_high_s16(vreinterpretq_s16_s32(c3.val[0])));
|
||||
|
||||
*a3 = vcombine_s16(vget_low_s16(vreinterpretq_s16_s32(c1.val[1])),
|
||||
vget_low_s16(vreinterpretq_s16_s32(c3.val[1])));
|
||||
*a7 = vcombine_s16(vget_high_s16(vreinterpretq_s16_s32(c1.val[1])),
|
||||
vget_high_s16(vreinterpretq_s16_s32(c3.val[1])));
|
||||
}
|
||||
|
||||
static INLINE void transpose_s16_4x4d(int16x4_t *a0, int16x4_t *a1,
|
||||
int16x4_t *a2, int16x4_t *a3) {
|
||||
// Swap 16 bit elements. Goes from:
|
||||
// a0: 00 01 02 03
|
||||
// a1: 10 11 12 13
|
||||
// a2: 20 21 22 23
|
||||
// a3: 30 31 32 33
|
||||
// to:
|
||||
// b0.val[0]: 00 10 02 12
|
||||
// b0.val[1]: 01 11 03 13
|
||||
// b1.val[0]: 20 30 22 32
|
||||
// b1.val[1]: 21 31 23 33
|
||||
|
||||
const int16x4x2_t b0 = vtrn_s16(*a0, *a1);
|
||||
const int16x4x2_t b1 = vtrn_s16(*a2, *a3);
|
||||
|
||||
// Swap 32 bit elements resulting in:
|
||||
// c0.val[0]: 00 10 20 30
|
||||
// c0.val[1]: 02 12 22 32
|
||||
// c1.val[0]: 01 11 21 31
|
||||
// c1.val[1]: 03 13 23 33
|
||||
|
||||
const int32x2x2_t c0 = vtrn_s32(vreinterpret_s32_s16(b0.val[0]),
|
||||
vreinterpret_s32_s16(b1.val[0]));
|
||||
const int32x2x2_t c1 = vtrn_s32(vreinterpret_s32_s16(b0.val[1]),
|
||||
vreinterpret_s32_s16(b1.val[1]));
|
||||
|
||||
*a0 = vreinterpret_s16_s32(c0.val[0]);
|
||||
*a1 = vreinterpret_s16_s32(c1.val[0]);
|
||||
*a2 = vreinterpret_s16_s32(c0.val[1]);
|
||||
*a3 = vreinterpret_s16_s32(c1.val[1]);
|
||||
}
|
||||
|
||||
#endif // AV1_COMMON_ARM_TRANSPOSE_NEON_H_
|
||||
401
third_party/aom/av1/common/arm/wiener_convolve_neon.c
vendored
Normal file
401
third_party/aom/av1/common/arm/wiener_convolve_neon.c
vendored
Normal file
|
|
@ -0,0 +1,401 @@
|
|||
/*
|
||||
* Copyright (c) 2018, Alliance for Open Media. All rights reserved
|
||||
*
|
||||
* This source code is subject to the terms of the BSD 2 Clause License and
|
||||
* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
|
||||
* was not distributed with this source code in the LICENSE file, you can
|
||||
* obtain it at www.aomedia.org/license/software. If the Alliance for Open
|
||||
* Media Patent License 1.0 was not distributed with this source code in the
|
||||
* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
|
||||
*/
|
||||
|
||||
#include <arm_neon.h>
|
||||
#include <assert.h>
|
||||
|
||||
#include "config/aom_config.h"
|
||||
#include "config/av1_rtcd.h"
|
||||
|
||||
#include "aom_dsp/txfm_common.h"
|
||||
#include "aom_ports/mem.h"
|
||||
#include "av1/common/common.h"
|
||||
#include "av1/common/arm/convolve_neon.h"
|
||||
#include "av1/common/arm/mem_neon.h"
|
||||
#include "av1/common/arm/transpose_neon.h"
|
||||
|
||||
/* Wiener filter 2D
|
||||
Apply horizontal filter and store in a temporary buffer. When applying
|
||||
vertical filter, overwrite the original pixel values.
|
||||
*/
|
||||
|
||||
void av1_wiener_convolve_add_src_neon(const uint8_t *src, ptrdiff_t src_stride,
|
||||
uint8_t *dst, ptrdiff_t dst_stride,
|
||||
const int16_t *filter_x, int x_step_q4,
|
||||
const int16_t *filter_y, int y_step_q4,
|
||||
int w, int h,
|
||||
const ConvolveParams *conv_params) {
|
||||
uint16_t *d_tmp;
|
||||
uint8_t *d;
|
||||
const uint8_t *src_ptr, *s_tmp;
|
||||
uint16_t *dst_ptr;
|
||||
(void)x_step_q4;
|
||||
(void)y_step_q4;
|
||||
|
||||
int width, height;
|
||||
const int bd = 8;
|
||||
const int intermediate_height = h + SUBPEL_TAPS - 1;
|
||||
const int center_tap = ((SUBPEL_TAPS - 1) / 2);
|
||||
int16_t filter_x_tmp[7], filter_y_tmp[7];
|
||||
|
||||
DECLARE_ALIGNED(16, uint16_t,
|
||||
temp[(MAX_SB_SIZE + HORIZ_EXTRA_ROWS) * MAX_SB_SIZE]);
|
||||
|
||||
assert(x_step_q4 == 16 && y_step_q4 == 16);
|
||||
assert(!(w % 8));
|
||||
|
||||
assert(w <= MAX_SB_SIZE);
|
||||
assert(h <= MAX_SB_SIZE);
|
||||
|
||||
assert(filter_x[7] == 0);
|
||||
assert(filter_y[7] == 0);
|
||||
|
||||
/* assumption of horizontal filtering output will not exceed 15 bit.
|
||||
((bd) + 1 + FILTER_BITS - conv_params->round_0) <= 15
|
||||
16 - conv_params->round_0 <= 15 -- (conv_params->round_0) >= 1
|
||||
*/
|
||||
assert((conv_params->round_0) >= 1);
|
||||
|
||||
memcpy(&filter_x_tmp[0], filter_x, sizeof(*filter_x) * FILTER_BITS);
|
||||
memcpy(&filter_y_tmp[0], filter_y, sizeof(*filter_y) * FILTER_BITS);
|
||||
|
||||
filter_x_tmp[3] += (1 << FILTER_BITS);
|
||||
filter_y_tmp[3] += (1 << FILTER_BITS);
|
||||
|
||||
s_tmp = src - center_tap * src_stride - center_tap;
|
||||
dst_ptr = temp;
|
||||
src_ptr = s_tmp;
|
||||
height = intermediate_height;
|
||||
|
||||
/* if height is a multiple of 8 */
|
||||
if (!(h & 7)) {
|
||||
int16x8_t res0, res1, res2, res3;
|
||||
uint16x8_t res4, res5, res6, res7, res8, res9, res10, res11;
|
||||
uint8x8_t t0, t1, t2, t3, t4, t5, t6, t7;
|
||||
uint8x8_t t8, t9, t10, t11, t12, t13, t14;
|
||||
|
||||
do {
|
||||
const uint8_t *s;
|
||||
|
||||
__builtin_prefetch(src_ptr + 0 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 1 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 2 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 3 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 4 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 5 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 6 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 7 * src_stride);
|
||||
|
||||
load_u8_8x8(src_ptr, src_stride, &t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
|
||||
transpose_u8_8x8(&t0, &t1, &t2, &t3, &t4, &t5, &t6, &t7);
|
||||
|
||||
s = src_ptr + 7;
|
||||
d_tmp = dst_ptr;
|
||||
width = w;
|
||||
|
||||
__builtin_prefetch(dst_ptr + 0 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 1 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 2 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 3 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 4 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 5 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 6 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 7 * dst_stride);
|
||||
|
||||
do {
|
||||
load_u8_8x8(s, src_stride, &t7, &t8, &t9, &t10, &t11, &t12, &t13, &t14);
|
||||
transpose_u8_8x8(&t7, &t8, &t9, &t10, &t11, &t12, &t13, &t14);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t0, t6));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t1, t5));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t2, t4));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t3));
|
||||
res4 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t1, t7));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t2, t6));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t3, t5));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t4));
|
||||
res5 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t2, t8));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t3, t7));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t4, t6));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t5));
|
||||
res6 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t3, t9));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t4, t8));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t5, t7));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t6));
|
||||
res7 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t4, t10));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t5, t9));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t6, t8));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t7));
|
||||
res8 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t5, t11));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t6, t10));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t7, t9));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t8));
|
||||
res9 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t6, t12));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t7, t11));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t8, t10));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t9));
|
||||
res10 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
res0 = vreinterpretq_s16_u16(vaddl_u8(t7, t13));
|
||||
res1 = vreinterpretq_s16_u16(vaddl_u8(t8, t12));
|
||||
res2 = vreinterpretq_s16_u16(vaddl_u8(t9, t11));
|
||||
res3 = vreinterpretq_s16_u16(vmovl_u8(t10));
|
||||
res11 = wiener_convolve8_horiz_8x8(res0, res1, res2, res3, filter_x_tmp,
|
||||
bd, conv_params->round_0);
|
||||
|
||||
transpose_u16_8x8(&res4, &res5, &res6, &res7, &res8, &res9, &res10,
|
||||
&res11);
|
||||
store_u16_8x8(d_tmp, MAX_SB_SIZE, res4, res5, res6, res7, res8, res9,
|
||||
res10, res11);
|
||||
|
||||
t0 = t8;
|
||||
t1 = t9;
|
||||
t2 = t10;
|
||||
t3 = t11;
|
||||
t4 = t12;
|
||||
t5 = t13;
|
||||
t6 = t14;
|
||||
s += 8;
|
||||
d_tmp += 8;
|
||||
width -= 8;
|
||||
} while (width > 0);
|
||||
src_ptr += 8 * src_stride;
|
||||
dst_ptr += 8 * MAX_SB_SIZE;
|
||||
height -= 8;
|
||||
} while (height > 0);
|
||||
} else {
|
||||
/*if height is a multiple of 4*/
|
||||
int16x8_t tt0, tt1, tt2, tt3;
|
||||
const uint8_t *s;
|
||||
uint16x4_t res0, res1, res2, res3, res4, res5, res6, res7;
|
||||
uint16x8_t d0, d1, d2, d3;
|
||||
int16x4_t s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10;
|
||||
int16x4_t s11, s12, s13, s14;
|
||||
uint8x8_t t0, t1, t2, t3;
|
||||
|
||||
do {
|
||||
__builtin_prefetch(src_ptr + 0 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 1 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 2 * src_stride);
|
||||
__builtin_prefetch(src_ptr + 3 * src_stride);
|
||||
|
||||
load_u8_8x4(src_ptr, src_stride, &t0, &t1, &t2, &t3); /*8x4*/
|
||||
transpose_u8_8x4(&t0, &t1, &t2,
|
||||
&t3); /*first 8 pixels of 4 rows transposed-- 4x8*/
|
||||
|
||||
tt0 = vreinterpretq_s16_u16(vmovl_u8(t0));
|
||||
tt1 = vreinterpretq_s16_u16(vmovl_u8(t1));
|
||||
tt2 = vreinterpretq_s16_u16(vmovl_u8(t2));
|
||||
tt3 = vreinterpretq_s16_u16(vmovl_u8(t3));
|
||||
|
||||
s0 = vget_low_s16(tt0); /*pa0 pb0 pc0 pd0 -- pixel_a0*/
|
||||
s1 = vget_low_s16(tt1); /*pa1 pb1 pc1 pd1 */
|
||||
s2 = vget_low_s16(tt2); /*pa2 pb2 pc2 pd2 */
|
||||
s3 = vget_low_s16(tt3); /*pa3 pb3 pc3 pd3 */
|
||||
s4 = vget_high_s16(tt0); /*pa4 pb4 pc4 pd4 */
|
||||
s5 = vget_high_s16(tt1); /*pa5 pb5 pc5 pd5 */
|
||||
s6 = vget_high_s16(tt2); /*pa6 pb6 pc6 pd6 */
|
||||
|
||||
__builtin_prefetch(dst_ptr + 0 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 1 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 2 * dst_stride);
|
||||
__builtin_prefetch(dst_ptr + 3 * dst_stride);
|
||||
|
||||
s = src_ptr + 7;
|
||||
d_tmp = dst_ptr;
|
||||
width = w;
|
||||
|
||||
do {
|
||||
load_u8_8x4(s, src_stride, &t0, &t1, &t2, &t3); /*8x4*/
|
||||
transpose_u8_8x4(&t0, &t1, &t2, &t3);
|
||||
|
||||
tt0 = vreinterpretq_s16_u16(vmovl_u8(t0));
|
||||
tt1 = vreinterpretq_s16_u16(vmovl_u8(t1));
|
||||
tt2 = vreinterpretq_s16_u16(vmovl_u8(t2));
|
||||
tt3 = vreinterpretq_s16_u16(vmovl_u8(t3));
|
||||
|
||||
s7 = vget_low_s16(tt0); /*pa7 pb7 pc7 pd7 */ /*4x8*/
|
||||
s8 = vget_low_s16(tt1); /*pa8 pb8 pc8 pd8 */
|
||||
s9 = vget_low_s16(tt2); /*pa9 pb9 pc9 pd9 */
|
||||
s10 = vget_low_s16(tt3); /*pa10 pb10 pc10 pd10 */
|
||||
s11 = vget_high_s16(tt0); /*pa11 pb11 pc11 pd11 */
|
||||
s12 = vget_high_s16(tt1); /*pa12 pb12 pc12 pd12 */
|
||||
s13 = vget_high_s16(tt2); /*pa13 pb13 pc13 pd13 */
|
||||
s14 = vget_high_s16(tt3); /*pa14 pb14 pc14 pd14 */
|
||||
|
||||
res0 = wiener_convolve8_horiz_4x8(
|
||||
s0, s1, s2, s3, s4, s5, s6, filter_x_tmp, bd, conv_params->round_0);
|
||||
res1 = wiener_convolve8_horiz_4x8(
|
||||
s1, s2, s3, s4, s5, s6, s7, filter_x_tmp, bd, conv_params->round_0);
|
||||
res2 = wiener_convolve8_horiz_4x8(
|
||||
s2, s3, s4, s5, s6, s7, s8, filter_x_tmp, bd, conv_params->round_0);
|
||||
res3 = wiener_convolve8_horiz_4x8(
|
||||
s3, s4, s5, s6, s7, s8, s9, filter_x_tmp, bd, conv_params->round_0);
|
||||
res4 =
|
||||
wiener_convolve8_horiz_4x8(s4, s5, s6, s7, s8, s9, s10,
|
||||
filter_x_tmp, bd, conv_params->round_0);
|
||||
res5 =
|
||||
wiener_convolve8_horiz_4x8(s5, s6, s7, s8, s9, s10, s11,
|
||||
filter_x_tmp, bd, conv_params->round_0);
|
||||
res6 =
|
||||
wiener_convolve8_horiz_4x8(s6, s7, s8, s9, s10, s11, s12,
|
||||
filter_x_tmp, bd, conv_params->round_0);
|
||||
res7 =
|
||||
wiener_convolve8_horiz_4x8(s7, s8, s9, s10, s11, s12, s13,
|
||||
filter_x_tmp, bd, conv_params->round_0);
|
||||
|
||||
transpose_u16_4x8(&res0, &res1, &res2, &res3, &res4, &res5, &res6,
|
||||
&res7, &d0, &d1, &d2, &d3);
|
||||
|
||||
store_u16_8x4(d_tmp, MAX_SB_SIZE, d0, d1, d2, d3);
|
||||
|
||||
s0 = s8;
|
||||
s1 = s9;
|
||||
s2 = s10;
|
||||
s3 = s11;
|
||||
s4 = s12;
|
||||
s5 = s13;
|
||||
s6 = s14;
|
||||
s += 8;
|
||||
d_tmp += 8;
|
||||
width -= 8;
|
||||
} while (width > 0);
|
||||
|
||||
src_ptr += 4 * src_stride;
|
||||
dst_ptr += 4 * MAX_SB_SIZE;
|
||||
height -= 4;
|
||||
} while (height > 0);
|
||||
}
|
||||
|
||||
{
|
||||
int16x8_t s0, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10;
|
||||
uint8x8_t t0, t1, t2, t3;
|
||||
int16_t *src_tmp_ptr, *s;
|
||||
uint8_t *dst_tmp_ptr;
|
||||
height = h;
|
||||
width = w;
|
||||
src_tmp_ptr = (int16_t *)temp;
|
||||
dst_tmp_ptr = dst;
|
||||
src_stride = MAX_SB_SIZE;
|
||||
|
||||
do {
|
||||
s = src_tmp_ptr;
|
||||
s0 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s1 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s2 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s3 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s4 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s5 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s6 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
d = dst_tmp_ptr;
|
||||
height = h;
|
||||
|
||||
do {
|
||||
__builtin_prefetch(dst_tmp_ptr + 0 * dst_stride);
|
||||
__builtin_prefetch(dst_tmp_ptr + 1 * dst_stride);
|
||||
__builtin_prefetch(dst_tmp_ptr + 2 * dst_stride);
|
||||
__builtin_prefetch(dst_tmp_ptr + 3 * dst_stride);
|
||||
|
||||
s7 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s8 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s9 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
s10 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
|
||||
t0 = wiener_convolve8_vert_4x8(s0, s1, s2, s3, s4, s5, s6, filter_y_tmp,
|
||||
bd, conv_params->round_1);
|
||||
t1 = wiener_convolve8_vert_4x8(s1, s2, s3, s4, s5, s6, s7, filter_y_tmp,
|
||||
bd, conv_params->round_1);
|
||||
t2 = wiener_convolve8_vert_4x8(s2, s3, s4, s5, s6, s7, s8, filter_y_tmp,
|
||||
bd, conv_params->round_1);
|
||||
t3 = wiener_convolve8_vert_4x8(s3, s4, s5, s6, s7, s8, s9, filter_y_tmp,
|
||||
bd, conv_params->round_1);
|
||||
|
||||
vst1_u8(d, t0);
|
||||
d += dst_stride;
|
||||
vst1_u8(d, t1);
|
||||
d += dst_stride;
|
||||
vst1_u8(d, t2);
|
||||
d += dst_stride;
|
||||
vst1_u8(d, t3);
|
||||
d += dst_stride;
|
||||
|
||||
s0 = s4;
|
||||
s1 = s5;
|
||||
s2 = s6;
|
||||
s3 = s7;
|
||||
s4 = s8;
|
||||
s5 = s9;
|
||||
s6 = s10;
|
||||
height -= 4;
|
||||
} while (height > 3);
|
||||
|
||||
if (height != 0) {
|
||||
__builtin_prefetch(dst_tmp_ptr + 0 * dst_stride);
|
||||
__builtin_prefetch(dst_tmp_ptr + 1 * dst_stride);
|
||||
|
||||
do {
|
||||
s7 = vld1q_s16(s);
|
||||
s += src_stride;
|
||||
|
||||
t0 =
|
||||
wiener_convolve8_vert_4x8(s0, s1, s2, s3, s4, s5, s6,
|
||||
filter_y_tmp, bd, conv_params->round_1);
|
||||
vst1_u8(d, t0);
|
||||
d += dst_stride;
|
||||
|
||||
s0 = s1;
|
||||
s1 = s2;
|
||||
s2 = s3;
|
||||
s3 = s4;
|
||||
s4 = s5;
|
||||
s5 = s6;
|
||||
s6 = s7;
|
||||
height -= 1;
|
||||
} while (height > 0);
|
||||
}
|
||||
|
||||
src_tmp_ptr += 8;
|
||||
dst_tmp_ptr += 8;
|
||||
|
||||
w -= 8;
|
||||
} while (w > 0);
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue