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https://repo.dactyloidae.xyz/Dactyloidae/UXP.git
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Issue #3049 - Wire up loongarch64 Ion backend compilation
This commit is contained in:
parent
2bc0085021
commit
4760c65706
10 changed files with 107 additions and 7 deletions
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@ -20,7 +20,7 @@
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#elif defined(JS_CODEGEN_ARM64)
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#elif defined(JS_CODEGEN_ARM64)
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# include "jit/arm64/CodeGenerator-arm64.h"
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# include "jit/arm64/CodeGenerator-arm64.h"
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#elif defined(JS_CODEGEN_LOONGARCH64)
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#elif defined(JS_CODEGEN_LOONGARCH64)
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# include "jit/none/CodeGenerator-none.h"
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# include "jit/mips64/CodeGenerator-mips64.h"
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#elif defined(JS_CODEGEN_MIPS32)
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#elif defined(JS_CODEGEN_MIPS32)
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# include "jit/mips32/CodeGenerator-mips32.h"
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# include "jit/mips32/CodeGenerator-mips32.h"
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#elif defined(JS_CODEGEN_MIPS64)
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#elif defined(JS_CODEGEN_MIPS64)
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@ -47,6 +47,19 @@ class OutOfLineCallPostWriteBarrier;
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class OutOfLineCallPostWriteElementBarrier;
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class OutOfLineCallPostWriteElementBarrier;
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class OutOfLineIsCallable;
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class OutOfLineIsCallable;
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class OutOfLineIsConstructor;
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class OutOfLineIsConstructor;
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class LSimdSplatX4;
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class LSimd128Int;
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class LSimd128Float;
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class LSimdReinterpretCast;
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class LSimdExtractElementI;
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class LSimdExtractElementF;
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class LSimdBinaryCompIx4;
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class LSimdBinaryCompFx4;
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class LSimdBinaryArithIx4;
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class LSimdBinaryArithFx4;
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class LSimdBinaryBitwise;
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class LSimdGeneralShuffleI;
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class LSimdGeneralShuffleF;
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class OutOfLineRegExpMatcher;
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class OutOfLineRegExpMatcher;
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class OutOfLineRegExpSearcher;
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class OutOfLineRegExpSearcher;
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class OutOfLineRegExpTester;
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class OutOfLineRegExpTester;
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@ -1928,7 +1928,8 @@ LAllocation::toRegister() const
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# endif
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# endif
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# include "jit/mips-shared/LIR-mips-shared.h"
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# include "jit/mips-shared/LIR-mips-shared.h"
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#elif defined(JS_CODEGEN_LOONGARCH64)
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#elif defined(JS_CODEGEN_LOONGARCH64)
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# include "jit/none/LIR-none.h"
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# include "jit/mips64/LIR-mips64.h"
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# include "jit/mips-shared/LIR-mips-shared.h"
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#elif defined(JS_CODEGEN_NONE)
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#elif defined(JS_CODEGEN_NONE)
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# include "jit/none/LIR-none.h"
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# include "jit/none/LIR-none.h"
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#else
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#else
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@ -15,7 +15,7 @@
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#elif defined(JS_CODEGEN_ARM64)
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#elif defined(JS_CODEGEN_ARM64)
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# include "jit/arm64/LOpcodes-arm64.h"
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# include "jit/arm64/LOpcodes-arm64.h"
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#elif defined(JS_CODEGEN_LOONGARCH64)
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#elif defined(JS_CODEGEN_LOONGARCH64)
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# include "jit/none/LOpcodes-none.h"
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# include "jit/mips64/LOpcodes-mips64.h"
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#elif defined(JS_CODEGEN_MIPS32)
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#elif defined(JS_CODEGEN_MIPS32)
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# include "jit/mips32/LOpcodes-mips32.h"
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# include "jit/mips32/LOpcodes-mips32.h"
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#elif defined(JS_CODEGEN_MIPS64)
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#elif defined(JS_CODEGEN_MIPS64)
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@ -19,7 +19,7 @@
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#elif defined(JS_CODEGEN_ARM64)
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#elif defined(JS_CODEGEN_ARM64)
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# include "jit/arm64/Lowering-arm64.h"
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# include "jit/arm64/Lowering-arm64.h"
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#elif defined(JS_CODEGEN_LOONGARCH64)
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#elif defined(JS_CODEGEN_LOONGARCH64)
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# include "jit/none/Lowering-none.h"
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# include "jit/mips64/Lowering-mips64.h"
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#elif defined(JS_CODEGEN_MIPS32)
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#elif defined(JS_CODEGEN_MIPS32)
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# include "jit/mips32/Lowering-mips32.h"
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# include "jit/mips32/Lowering-mips32.h"
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#elif defined(JS_CODEGEN_MIPS64)
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#elif defined(JS_CODEGEN_MIPS64)
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@ -266,6 +266,14 @@ class MacroAssemblerLOONGARCH64 : public Assembler {
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// multiplies. For now, there are only few that we care about.
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// multiplies. For now, there are only few that we care about.
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void ma_mul(Register rd, Register rj, Imm32 imm);
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void ma_mul(Register rd, Register rj, Imm32 imm);
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void ma_mul_branch_overflow(Register rd, Register rj, Register rk,
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Label* overflow) {
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ma_mul32TestOverflow(rd, rj, rk, overflow);
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}
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void ma_mul_branch_overflow(Register rd, Register rj, Imm32 imm,
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Label* overflow) {
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ma_mul32TestOverflow(rd, rj, imm, overflow);
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}
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void ma_mul32TestOverflow(Register rd, Register rj, Register rk,
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void ma_mul32TestOverflow(Register rd, Register rj, Register rk,
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Label* overflow);
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Label* overflow);
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void ma_mul32TestOverflow(Register rd, Register rj, Imm32 imm,
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void ma_mul32TestOverflow(Register rd, Register rj, Imm32 imm,
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@ -283,6 +291,24 @@ class MacroAssemblerLOONGARCH64 : public Assembler {
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void ma_mod_mask(Register src, Register dest, Register hold, Register remain,
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void ma_mod_mask(Register src, Register dest, Register hold, Register remain,
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int32_t shift, Label* negZero = nullptr);
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int32_t shift, Label* negZero = nullptr);
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void ma_addu(Register rd, Register rj, Register rk) { as_add_w(rd, rj, rk); }
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void ma_addu(Register rd, Register rj, Imm32 imm) { ma_add_w(rd, rj, imm); }
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void ma_subu(Register rd, Register rj, Register rk) { as_sub_w(rd, rj, rk); }
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void ma_subu(Register rd, Register rj, Imm32 imm) { ma_sub_w(rd, rj, imm); }
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void ma_negu(Register rd, Register rj) { as_sub_w(rd, zero, rj); }
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void ma_sll(Register rd, Register rj, Register rk) { as_sll_w(rd, rj, rk); }
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void ma_sll(Register rd, Register rj, Imm32 imm) {
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as_slli_w(rd, rj, imm.value & 0x1f);
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}
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void ma_srl(Register rd, Register rj, Register rk) { as_srl_w(rd, rj, rk); }
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void ma_srl(Register rd, Register rj, Imm32 imm) {
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as_srli_w(rd, rj, imm.value & 0x1f);
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}
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void ma_sra(Register rd, Register rj, Register rk) { as_sra_w(rd, rj, rk); }
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void ma_sra(Register rd, Register rj, Imm32 imm) {
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as_srai_w(rd, rj, imm.value & 0x1f);
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}
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// branches when done from within la-specific code
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// branches when done from within la-specific code
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void ma_b(Register lhs, Register rhs, Label* l, Condition c,
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void ma_b(Register lhs, Register rhs, Label* l, Condition c,
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JumpKind jumpKind = LongJump);
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JumpKind jumpKind = LongJump);
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@ -333,11 +359,31 @@ class MacroAssemblerLOONGARCH64 : public Assembler {
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void ma_bc_d(FloatRegister lhs, FloatRegister rhs, Label* label,
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void ma_bc_d(FloatRegister lhs, FloatRegister rhs, Label* label,
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DoubleCondition c, JumpKind jumpKind = LongJump,
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DoubleCondition c, JumpKind jumpKind = LongJump,
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FPConditionBit fcc = FCC0);
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FPConditionBit fcc = FCC0);
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void ma_bc1s(FloatRegister lhs, FloatRegister rhs, Label* label,
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DoubleCondition c, JumpKind jumpKind = LongJump,
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FPConditionBit fcc = FCC0) {
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ma_bc_s(lhs, rhs, label, c, jumpKind, fcc);
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}
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void ma_bc1d(FloatRegister lhs, FloatRegister rhs, Label* label,
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DoubleCondition c, JumpKind jumpKind = LongJump,
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FPConditionBit fcc = FCC0) {
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ma_bc_d(lhs, rhs, label, c, jumpKind, fcc);
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}
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void ma_call(ImmPtr dest);
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void ma_call(ImmPtr dest);
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void ma_jump(ImmPtr dest);
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void ma_jump(ImmPtr dest);
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void as_mul(Register rd, Register rj, Register rk) { as_mul_w(rd, rj, rk); }
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void as_mtc1(Register rt, FloatRegister fs) { as_movgr2fr_w(fs, rt); }
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void as_mfc1(Register rt, FloatRegister fs) { as_movfr2gr_s(rt, fs); }
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void as_divd(FloatRegister fd, FloatRegister fj, FloatRegister fk) {
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as_fdiv_d(fd, fj, fk);
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}
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void as_divs(FloatRegister fd, FloatRegister fj, FloatRegister fk) {
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as_fdiv_s(fd, fj, fk);
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}
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void ma_cmp_set(Register dst, Register lhs, Register rhs, Condition c);
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void ma_cmp_set(Register dst, Register lhs, Register rhs, Condition c);
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void ma_cmp_set(Register dst, Register lhs, Imm32 imm, Condition c);
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void ma_cmp_set(Register dst, Register lhs, Imm32 imm, Condition c);
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void ma_cmp_set_double(Register dst, FloatRegister lhs, FloatRegister rhs,
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void ma_cmp_set_double(Register dst, FloatRegister lhs, FloatRegister rhs,
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@ -136,7 +136,7 @@ CodeGeneratorMIPSShared::visitCompare(LCompare* comp)
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const LAllocation* right = comp->getOperand(1);
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const LAllocation* right = comp->getOperand(1);
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const LDefinition* def = comp->getDef(0);
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const LDefinition* def = comp->getDef(0);
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#ifdef JS_CODEGEN_MIPS64
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#if defined(JS_CODEGEN_MIPS64) || defined(JS_CODEGEN_LOONGARCH64)
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if (mir->compareType() == MCompare::Compare_Object) {
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if (mir->compareType() == MCompare::Compare_Object) {
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if (right->isGeneralReg())
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if (right->isGeneralReg())
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masm.cmpPtrSet(cond, ToRegister(left), ToRegister(right), ToRegister(def));
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masm.cmpPtrSet(cond, ToRegister(left), ToRegister(right), ToRegister(def));
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@ -160,7 +160,7 @@ CodeGeneratorMIPSShared::visitCompareAndBranch(LCompareAndBranch* comp)
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MCompare* mir = comp->cmpMir();
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MCompare* mir = comp->cmpMir();
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Assembler::Condition cond = JSOpToCondition(mir->compareType(), comp->jsop());
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Assembler::Condition cond = JSOpToCondition(mir->compareType(), comp->jsop());
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#ifdef JS_CODEGEN_MIPS64
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#if defined(JS_CODEGEN_MIPS64) || defined(JS_CODEGEN_LOONGARCH64)
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if (mir->compareType() == MCompare::Compare_Object) {
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if (mir->compareType() == MCompare::Compare_Object) {
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if (comp->right()->isGeneralReg()) {
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if (comp->right()->isGeneralReg()) {
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emitBranch(ToRegister(comp->left()), ToRegister(comp->right()), cond,
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emitBranch(ToRegister(comp->left()), ToRegister(comp->right()), cond,
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@ -617,8 +617,12 @@ CodeGeneratorMIPSShared::visitDivI(LDivI* ins)
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// All regular. Lets call div.
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// All regular. Lets call div.
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if (mir->canTruncateRemainder()) {
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if (mir->canTruncateRemainder()) {
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#ifdef JS_CODEGEN_LOONGARCH64
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masm.as_div_w(dest, lhs, rhs);
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#else
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masm.as_div(lhs, rhs);
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masm.as_div(lhs, rhs);
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masm.as_mflo(dest);
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masm.as_mflo(dest);
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#endif
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} else {
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} else {
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MOZ_ASSERT(mir->fallible());
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MOZ_ASSERT(mir->fallible());
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@ -749,8 +753,12 @@ CodeGeneratorMIPSShared::visitModI(LModI* ins)
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masm.bind(¬Negative);
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masm.bind(¬Negative);
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}
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}
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#ifdef JS_CODEGEN_LOONGARCH64
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masm.as_mod_w(dest, lhs, rhs);
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#else
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masm.as_div(lhs, rhs);
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masm.as_div(lhs, rhs);
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masm.as_mfhi(dest);
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masm.as_mfhi(dest);
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#endif
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// If X%Y == 0 and X < 0, then we *actually* wanted to return -0.0
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// If X%Y == 0 and X < 0, then we *actually* wanted to return -0.0
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if (mir->canBeNegativeDividend()) {
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if (mir->canBeNegativeDividend()) {
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@ -2440,15 +2448,24 @@ CodeGeneratorMIPSShared::visitUDivOrMod(LUDivOrMod* ins)
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}
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}
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}
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}
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#ifdef JS_CODEGEN_LOONGARCH64
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masm.as_mod_wu(ScratchRegister, lhs, rhs);
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masm.move32(ScratchRegister, output);
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#else
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masm.as_divu(lhs, rhs);
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masm.as_divu(lhs, rhs);
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masm.as_mfhi(output);
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masm.as_mfhi(output);
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#endif
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// If the remainder is > 0, bailout since this must be a double.
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// If the remainder is > 0, bailout since this must be a double.
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if (ins->mir()->isDiv()) {
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if (ins->mir()->isDiv()) {
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if (!ins->mir()->toDiv()->canTruncateRemainder())
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if (!ins->mir()->toDiv()->canTruncateRemainder())
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bailoutCmp32(Assembler::NonZero, output, output, ins->snapshot());
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bailoutCmp32(Assembler::NonZero, output, output, ins->snapshot());
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// Get quotient
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// Get quotient
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#ifdef JS_CODEGEN_LOONGARCH64
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masm.as_div_wu(output, lhs, rhs);
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#else
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masm.as_mflo(output);
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masm.as_mflo(output);
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#endif
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}
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}
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if (!ins->mir()->isTruncated())
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if (!ins->mir()->isTruncated())
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@ -13,6 +13,19 @@ namespace jit {
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class OutOfLineBailout;
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class OutOfLineBailout;
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class OutOfLineTableSwitch;
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class OutOfLineTableSwitch;
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class LSimdSplatX4;
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class LSimd128Int;
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class LSimd128Float;
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class LSimdReinterpretCast;
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class LSimdExtractElementI;
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class LSimdExtractElementF;
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class LSimdBinaryCompIx4;
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class LSimdBinaryCompFx4;
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class LSimdBinaryArithIx4;
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class LSimdBinaryArithFx4;
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class LSimdBinaryBitwise;
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class LSimdGeneralShuffleI;
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class LSimdGeneralShuffleF;
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class CodeGeneratorMIPSShared : public CodeGeneratorShared
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class CodeGeneratorMIPSShared : public CodeGeneratorShared
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{
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{
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@ -181,3 +181,9 @@ LIRGeneratorMIPS64::visitRandom(MRandom* ins)
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LRandom *lir = new(alloc()) LRandom(temp(), temp(), temp());
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LRandom *lir = new(alloc()) LRandom(temp(), temp(), temp());
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defineFixed(lir, ins, LFloatReg(ReturnDoubleReg));
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defineFixed(lir, ins, LFloatReg(ReturnDoubleReg));
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}
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}
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void
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LIRGeneratorMIPS64::visitSignExtendInt64(MSignExtendInt64* ins)
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{
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defineInt64(new(alloc()) LSignExtendInt64(useInt64RegisterAtStart(ins->input())), ins);
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}
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@ -46,6 +46,7 @@ class LIRGeneratorMIPS64 : public LIRGeneratorMIPSShared
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void visitUnbox(MUnbox* unbox);
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void visitUnbox(MUnbox* unbox);
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void visitReturn(MReturn* ret);
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void visitReturn(MReturn* ret);
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void visitRandom(MRandom* ins);
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void visitRandom(MRandom* ins);
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void visitSignExtendInt64(MSignExtendInt64* ins);
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};
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};
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typedef LIRGeneratorMIPS64 LIRGeneratorSpecific;
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typedef LIRGeneratorMIPS64 LIRGeneratorSpecific;
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@ -533,6 +533,8 @@ elif CONFIG['JS_CODEGEN_LOONGARCH64']:
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'jit/mips-shared/Bailouts-mips-shared.cpp',
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'jit/mips-shared/Bailouts-mips-shared.cpp',
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'jit/mips-shared/BaselineCompiler-mips-shared.cpp',
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'jit/mips-shared/BaselineCompiler-mips-shared.cpp',
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'jit/mips-shared/BaselineIC-mips-shared.cpp',
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'jit/mips-shared/BaselineIC-mips-shared.cpp',
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'jit/mips-shared/CodeGenerator-mips-shared.cpp',
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'jit/mips-shared/Lowering-mips-shared.cpp',
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'jit/mips-shared/MoveEmitter-mips-shared.cpp',
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'jit/mips-shared/MoveEmitter-mips-shared.cpp',
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]
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]
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jit_ioncheck2_deunified_sources += [
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jit_ioncheck2_deunified_sources += [
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@ -541,6 +543,8 @@ elif CONFIG['JS_CODEGEN_LOONGARCH64']:
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'jit/loongarch64/Bailouts-loongarch64.cpp',
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'jit/loongarch64/Bailouts-loongarch64.cpp',
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'jit/loongarch64/BaselineCompiler-loongarch64.cpp',
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'jit/loongarch64/BaselineCompiler-loongarch64.cpp',
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'jit/loongarch64/BaselineIC-loongarch64.cpp',
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'jit/loongarch64/BaselineIC-loongarch64.cpp',
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'jit/mips64/CodeGenerator-mips64.cpp',
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'jit/mips64/Lowering-mips64.cpp',
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'jit/loongarch64/MacroAssembler-loongarch64.cpp',
|
'jit/loongarch64/MacroAssembler-loongarch64.cpp',
|
||||||
'jit/loongarch64/SharedIC-loongarch64.cpp',
|
'jit/loongarch64/SharedIC-loongarch64.cpp',
|
||||||
'jit/loongarch64/Trampoline-loongarch64.cpp',
|
'jit/loongarch64/Trampoline-loongarch64.cpp',
|
||||||
|
|
@ -783,4 +787,3 @@ selfhosted.inputs = [
|
||||||
if CONFIG['CLANG_CXX'] or CONFIG['GNU_CXX']:
|
if CONFIG['CLANG_CXX'] or CONFIG['GNU_CXX']:
|
||||||
SOURCES['jsdtoa.cpp'].flags += ['-Wno-implicit-fallthrough']
|
SOURCES['jsdtoa.cpp'].flags += ['-Wno-implicit-fallthrough']
|
||||||
|
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue