From 6a506a38dc36bbe788da4498dd3e0a73e90f69c4 Mon Sep 17 00:00:00 2001 From: Nishi Date: Tue, 4 Aug 2026 21:03:15 +0900 Subject: [PATCH] update --- bus.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/bus.txt b/bus.txt index 8a6b89c..49e5fb5 100644 --- a/bus.txt +++ b/bus.txt @@ -10,7 +10,7 @@ Note that the PCB edge is at the top of this diagram. Left connector | 1| 2| 3| 4| 5| 6| 7| 8| 9| 10| 11| 12| 13| 14| 15| 16| 17| 18| 19| 20| | A23| A22| A21| A20| A19| A18| A17| A16| A15| A14| GND| A13| A12| A11| A10| A09| A08| A07| A06| A05| -| A04| A03| A02| A01| GND| AS| R/W| UDS| LDS| GND| RESET| HALT| CLK| DTACK| GND| RES| RES| RES| 5V| 5V| +| A04| A03| A02| A01| GND| AS| R/W| UDS| LDS| GND| RESET| HALT| CLK| DTACK| GND| RD| WR| RES| 5V| 5V| | 21| 22| 23| 24| 25| 26| 27| 28| 29| 30| 31| 32| 33| 34| 35| 36| 37| 38| 39| 40| Middle connector @@ -30,11 +30,13 @@ Notes /IRQ0-/IRQ7 are active-low interrupt request inputs to the CPU board. /IACK0-/IACK7 are active-low interrupt acknowledge outputs generated by the CPU board. /IOACK0-/IOACK7 are active-low I/O acknowledge inputs to the CPU board. + /RD and /WR are /RW, but transltaed to 2 signals generated by the CPU board. All other signals are the direct MC68000/MC68010 signals. Consult the MC68000/MC68010 documentation set for their definitions and active polarity. Signal Direction ------------------------------------------------ + /RD /WR CPU board -> Exapnsion board /IO0-/IO7 CPU board -> Expansion board /IRQ0-/IRQ7 Expansion board -> CPU board /IACK0-/IACK7 CPU board -> Expansion board